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Basic
Combinational
Logic
Circuits
AnalysisImplementing(
Design
)
Combinational
Logic組合邏輯電路的實(shí)現(xiàn)(設(shè)計(jì))The
Universal
Property
of
NAND
and
NOR
Gates5-4 Combinational
Logic
Using
NANDand
NOR
Gates5-5 Logic
Circuit
Operation
With
Pulse
Waveform5 Analysis
and
Design
of
Combinational
LogicCHAPTER
OUTLINE組合邏輯電路分析和設(shè)計(jì)Definition
of
Combinational
LogicLogic
circuits
without
feedback
from
output
to
the
input,
outputsdepend
only
on
current
inputs
(not
on
history).
constructed
from
afunctionally
complete
gate
set,are
said
to
be
combinational5-1 Basic
Combinational
Logic
AnalysisKinds
of
combinational
analysis:exhaustive
(truth
table)algebraic
(expressions)simulation
/
test
benchAND-OR
Logic(與-或邏輯電路)AND-OR-Invert
Logic(與-或-非邏輯電路)Exclusive-OR
Logic(異-或邏輯電路)AND-OR
LogicINPUTSA
B
C
DABCDOUTPUTX0000000000100000100000011011010000001010000110000011101110000001001000101000010110111100101110110111101011111111ABX
X=AB+CDCDFigure5-1
An
example
of
AND-OR
logicTruth
table
for
AND-ORlogic
in
Figure
5-1SOPEXAMPLE
5-1(P153)X=?液位指示器Low-lever:
1ABBCACX=AB+BC+ACTruth
tableA
BCABBCACX00000000010000010000001101011000000101001111010011111111steps:logiccircuitRelation
of
inputsand
outputsCombinational
logic
analysis由給定的邏輯圖逐級(jí)寫(xiě)出邏輯關(guān)系表達(dá)式。用邏輯代數(shù)或卡諾圖對(duì)邏輯代數(shù)進(jìn)行化簡(jiǎn)。列出輸入輸出狀態(tài)表并得出結(jié)論。AND-OR
Invert
LogicEXAMPLE 5-1-2X=AB+BC+AC
=
ABBCAC=
(
A
+
B)(B
+
C)(
A
+
C)Truth
tableA
BCABBCACX00000010010001010000001101001000001101001011010001111110Exclusive-OR
LogicABX000011101110Two
equivalent
ways
of
implementing
the
exclusive-NOR.不同的電路可能實(shí)現(xiàn)同一個(gè)邏輯命題。Circuit
AfunctionCircuit
B…5-2 Implementing
Combinational
Logic組合邏輯電路的實(shí)現(xiàn)From
Boolean
expression
to
logiccircuitGiven
a
Boolean
expression,
create
alogic
circuit
that
implements
thatexpression.From
truth
table
to
logic
circuitGiven
a
truth
table,
create
a
logic
circuitthat
implements
that
table.From
Booleanexpression
to
logic
circuit-
Given
a
Booleanexpression,
create
a
logic
circuit
that
implementsthat
expression.Logic
circuit
for
X
=
AB
+
CDE.From
truth
table
to
logiccircuit-
Given
a
truth
table,
create
a
logic
circuit
that
implements
that
table.AINPUTBCOUTPUTXPRODUCT
EARM0000001001000111ABC1001ABC101011001110-Sum-of-productsformBoolean
SOPexpression
from
the
table
by
ORing
the
product
termsfor
which
X=1
isX
=
ABC
+
ABCA
taskthe
logiccircuitstepsCombinational
logic
design
(implement)a.
Taska
truth
table.a minimum
expression.b.
truth
tablec.
Expressiona
expressionthe logic
circuitAn
ApplicationLight
monitor
with
serious
faultsImplement
a
logic
circuit
for
A
traffic
light
monitor
systemnormal
operationABCY00010010010001111000101111011111Y
=
AB
C
+
ABC
+
ABC
+
ABC
+
ABCY
=
AB
C
+
ABC
+
ABC
+
ABC
+
ABCAB
CABC00
01111001100
11101ACABBCY
=
AB
C
+
AC
+
AB
+
BCY
=
AB
C
+
AC
+
AB
+
BCThe
logic
circuit
for
A
traffic
light
monitor
systemABCF00000010010001111000101111011111例:設(shè)計(jì)三人表決電路(A、B、C)。每人一個(gè)按鍵,如果同意則按下,不同意則不按。結(jié)果用指示燈表示,多數(shù)同意時(shí)指示燈亮,否則不亮。真值表首先指明邏輯符號(hào)取“0”、“1”的含義。三個(gè)按鍵A、B、C按下時(shí)為“1”,不按時(shí)為“0”。輸出是F,多數(shù)贊成時(shí)是“1”,否則是“0”。根據(jù)題意列出真值表。ABCF0000001001000111100010111101111100
01
11
10A010
0
1
00
1
1
1ABc.
畫(huà)出卡諾圖,并用卡諾圖化簡(jiǎn):真值表BCBCACF
=
AB
+
BC
+
CAd.
根據(jù)邏輯表達(dá)式畫(huà)出邏輯圖。F
=
AB
+
BC
+
CA若用與、或門(mén)實(shí)現(xiàn)=
AB
+
BC
+
CA=
AB
BC
CAF
=
AB
+
BC
+
CA若用與非門(mén)實(shí)現(xiàn)For
the
input
waveform
in
Figure
5-29
,
what
logic
circuit
willgenerate
the
output.(一)設(shè)計(jì)一個(gè)舉重裁判表決器。設(shè)舉重比賽有三個(gè)裁判,一個(gè)主裁判和兩個(gè)副裁判。杠鈴?fù)耆e上的裁決由每一個(gè)裁判按一下自己面前的按鈕來(lái)確定。只有當(dāng)兩個(gè)或兩個(gè)以上裁判(其中必須有主裁判)判明成功時(shí),表示“成功”的燈才亮。(要求用與非門(mén)實(shí)現(xiàn))(二)某設(shè)備有開(kāi)關(guān)A、B、C,要求僅在開(kāi)關(guān)A接通的條件下,開(kāi)關(guān)B才能接通;開(kāi)關(guān)C僅在開(kāi)關(guān)B接通的條件下才能接通。違反這一規(guī)程,則發(fā)出報(bào)警信號(hào)。設(shè)計(jì)一個(gè)由與非門(mén)組成的能實(shí)現(xiàn)這一功能的報(bào)警控制電路。(要求用與非門(mén)實(shí)現(xiàn))(三)設(shè)計(jì)一個(gè)路燈控制電路,要求實(shí)現(xiàn)的功能是:當(dāng)總電源開(kāi)關(guān)閉和時(shí),安裝在三個(gè)不同地方的三個(gè)開(kāi)關(guān)都能獨(dú)立地將燈打開(kāi)或熄滅;當(dāng)總電源開(kāi)關(guān)斷開(kāi)時(shí),路燈不亮。(要求用異或門(mén)和與門(mén)實(shí)現(xiàn))(四)設(shè)計(jì)一半加器電路.(要求用與非門(mén)實(shí)現(xiàn))Applications5-3 The
Universal
Propertyof
NAND
and
NOR
GatesNAND
and
NOR
gates
are
“universal”
because
theycan
used
to
produce
any
of
the
other
logic
functions.The
NAND
Gate
as
a
Universal
Logic
ElementThe
NOR
Gate
as
a
Universal
Logic
ElementThe
NAND
Gate
as
a
Universal
Logic
ElementNAND
Gate
as
an
Inverter?Quote:
Inverters
can
also
be
considered
nand
gates:AAHIGH??Two
NAND
Gates
as
an
AND
Gate?AB
=
ABThree
NAND
Gates
as
an
ORGateA
+
B
=
A
+
B
=
ABFour
NAND
Gates
as
OR
GateA
+
B
=
AB
=
ABThe
NOR
Gate
as
a
Universal
Logic
ElementNOR
Gate
as
an
InverterTwo
NOR
Gates
as
an
OR
GateThree
NOR
Gates
as
an
AND
GateFour
NOR
Gates
as
an
AND
Gate5-4 COMBINATIONAL
LOGIC
USING
NANDAND
NOR
GATENAND
LOGICNOR
LOGICNAND
LOGICA
NAND
gate
can
function
as
either
a
NAND
or
a
negative-OR
.AB=A+BNANDnegative-ORNAND
logic
for
X
=
AB
+
CD.Development
of
the
AND-OR
equivalent.NOR
LOGICA
NOR
gate
function
as
either
a
NOR
or
a
negate-AND.A+B=ABNORnegative-ORNOR
logic
for
X
=
(A
+
B)(C
+
D)5-5 CIRCUIT
OPERATION
WITH
PULSE
WAVEFORMINPUTSDetermine
the
final
output
waveform
X
for
the
circuit
infigure
5-29
,with
input
waveforms
A,B
,and
C
as
shown.?Draw
the
timing
diagram
for
the
circuit
in
Figure
5-30shown
the
outputs
of
G1,G2.Figure
5–42Illustration
of
a
node
in
a
logic
circuit.Thomas
L.
FloydDigital
Fundamentals,
9eCopyright
?2006
by
Pearson
Education,
Inc
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