EDA數(shù)字秒表設(shè)計(jì)

1、數(shù)字秒表設(shè)計(jì)控制科學(xué)與工程學(xué)院自動(dòng)化0803電子設(shè)計(jì)自動(dòng)化大作業(yè)數(shù)字秒表設(shè)計(jì)控制科學(xué)與工程學(xué)院自動(dòng)化0803題目學(xué)院班級(jí)姓名學(xué)號(hào)OO一一年五月十二日題目：數(shù)字秒表的設(shè)計(jì)題目：數(shù)字秒表的設(shè)計(jì)一、設(shè)計(jì)要求：數(shù)字秒表的計(jì)時(shí)精度是10ms;復(fù)位開(kāi)關(guān)可以在任何情況下使用，計(jì)時(shí)在計(jì)時(shí)過(guò)程中，只要按一下復(fù)位開(kāi)關(guān)，計(jì)時(shí)器就清零，并做好下次計(jì)時(shí)的準(zhǔn)備；具有啟/停開(kāi)關(guān)，即按一下啟/停開(kāi)關(guān)，啟動(dòng)計(jì)時(shí)器開(kāi)始計(jì)時(shí)，再按一下啟/停開(kāi)關(guān)則停止計(jì)時(shí)。數(shù)字秒表的計(jì)時(shí)范圍是0秒59分59.99秒，顯示的最長(zhǎng)時(shí)間為59分59秒、總體設(shè)計(jì)：1、總體結(jié)構(gòu)圖2、各模塊功能SEL模塊：將掃描信號(hào)輸給選擇(CHOICE)模塊選擇模塊：按掃描

2、信號(hào)的指定選擇輸出3-8譯碼模塊：通過(guò)SEL給的信號(hào)來(lái)控制8位數(shù)碼管位的亮滅計(jì)時(shí)模塊：分別對(duì)毫秒，秒，分計(jì)時(shí)顯示模塊：通過(guò)CHOICE模塊的輸出信號(hào)來(lái)控制三、單元模塊設(shè)計(jì)1、模塊名：sel模塊設(shè)計(jì)sei!relks-elout2.0inst5i(D模塊功能：CLK為掃描時(shí)鐘脈沖，SELOUT端不停的發(fā)出掃描到的信號(hào)端口定義:CLK為信號(hào)輸入端SELOUT2.0為選擇到的信號(hào)輸出VHDL源程序libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entityselisport(clk:instd_logic;s

3、elout:outstd_logic_vector(2downto0);endsel;architectureoneofselissignalcount:std_logic_vector(2downto0);beginprocess(clk)beginifclkeventandclk=1thenif(count二101)thencount二000;elsecount二count+1;endif;endif;endprocess;selout二count;endone;(4)仿真結(jié)果2、模塊名:選擇模塊設(shè)計(jì)CHOICEdata丄2dat.a23.00chout3.CdA+.A330data43C

4、HOICEdata丄2dat.a23.00chout3.CdA+.A330data430da+.a53.0djit.aG3.0y.6III11(1)模塊功能：按掃描信號(hào)的指定選擇輸出(2)端口定乂：a,b,c為控制信號(hào);datal3.O,data23.O,data33.O,data43.O,data53.O,data63.O分別是毫秒的低位，毫秒的高位，秒的低位，秒的高位，分的低位，分的高位的數(shù)據(jù)值;ch_out3.0為選擇輸出端。(3)VHDL源程序libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;en

5、titychoiceisport(a,b,c:instd_logic;datal,data2,data3,data4,data5,data6:instd_logic_vector(3downto0);ch_out:outstd_logic_vector(3downto0);endchoice;architecturebehaveofchoiceissignalch:std_logic_vector(2downto0);beginch(2)=c;ch(1)=b;ch(0)ch_out二datai;when001=ch_out二data2;when010=ch_out二data3;when011=

6、ch_outch_outch_outnull;endcase;endprocess;endbehave;(4)仿真結(jié)果imid宜9“-ai”UQm.3*5iUlibwramale1HID*XDllTH.I.XXnoXinIXwiXausXrai.pnioHDIXIcaa5fphiXoctiItncriInmJfrenQU.UJJDK!IK4LQW.-iZjroiiK4Ljm?)Mu.-iHIHOtOO0m怎taoi說(shuō)明：abc的值遞增，ch_out選擇輸出data1,data2,data3,data4,data5,data6的值，證明模塊是正確的3、模塊名：3-8譯碼模塊設(shè)計(jì)1SEL2.OQ7

7、.O1iinstGr-i-：模塊功能：通過(guò)SEL給的信號(hào)來(lái)控制8位數(shù)碼管位的亮滅。端口定義：輸入端SEL2.O值大小來(lái)選擇輸出Q的值輸出端Q7.O來(lái)控制燈哪位亮VHDL源程序LIBRARYieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;ENTITYdecode3_8ISPORT(SEL:INstd_logic_vector(2downto0);Q:OUTstd_logic_vector(7downto0);ENDdecode3_8;ARCHITECTUREaOFdecode3_8ISBEGINQUD50.p%EiXL

8、pke70.D91Dis40DICQ0m：I：1H0IMLH弱：;血KU鏗Hi血KU鏗HiOEILLlilR:MJ5Nl.Cffl(IlxJCOxJO.xJJII11LT(MxNX1mimi；1111口囂】JLLIIJM】IJLUlIL】HLLUIIL1口山和兒J/lJHL獲LLIHLlIHLI.U：1IMLIlILqIJJLLLi：!工LUlftlLL說(shuō)明：Sel的值遞增，Q的相應(yīng)位會(huì)亮，證明模塊是正確的。41模塊名：毫秒計(jì)時(shí)模塊設(shè)計(jì)模塊功能：對(duì)毫秒位的計(jì)數(shù)端口定乂：elk為信號(hào)時(shí)鐘輸入端reset為復(fù)位端pause為暫停端co為進(jìn)位信號(hào)輸出端qh:毫秒信號(hào)的高位輸出端ql：毫秒信號(hào)的低位輸

9、出端VHDL源程序libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entitym100isport(clk:instd_logic;reset:instd_logic;pause:instd_logic;co:outstd_logic;qh:bufferstd_logic_vector(3downto0);ql:bufferstd_logic_vector(3downto0);endm100;architecturebehaveofm100isbeginco=1when(qh=1001andql=100

10、1)else0;process(clk,reset,pause)beginif(reset=0)thenqh=0000;ql=0000;elsif(pause=0)thenqh=qh;ql=ql;elsif(clkeventandclk=1)thenif(ql=1001)thenql=0000;if(qh=1001)thenqh=0000;elseqh=qh+1;endif;elseql=ql+1;endif;endif;endprocess;endbehave;說(shuō)明：毫秒為100進(jìn)制，高位和地位都是10進(jìn)制，高位到10會(huì)有進(jìn)位，可以證明模塊的正確性4.2模塊名：秒計(jì)時(shí)模塊設(shè)計(jì)模塊功能：對(duì)毫秒

11、位的計(jì)數(shù)端口定乂：elk為信號(hào)時(shí)鐘輸入端reset為復(fù)位端pause為暫停端co為進(jìn)位信號(hào)輸出端qh:毫秒信號(hào)的高位輸出端ql：毫秒信號(hào)的低位輸出端(3)VHDL源程序libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entitym60_secisport(reset:instd_logic;pause:instd_logic;ci:instd_logic;co:outstd_logic;qh:bufferstd_logic_vector(3downto0);ql:bufferstd_logic_vect

12、or(3downto0);endm60_sec;architecturebehaveofm60_secisbeginco=1when(qh=0101andql=1001andci=1)else0;process(reset,pause,ci)beginif(reset=0)thenqh=0000;ql=0000;elsif(pause=0)thenqh=qh;ql=ql;elsif(cieventandci=1)thenif(ql=1001)thenql=0000;if(qh=0101)thenqh=0000;elseqh=qh+1;endif;elseql=ql+1;endif;endif;

13、endprocess;endbehave;(4)仿真結(jié)果4.3模塊名：分計(jì)時(shí)模塊設(shè)計(jì)模塊功能：對(duì)毫秒位的計(jì)數(shù)端口定乂：elk為信號(hào)時(shí)鐘輸入端reset為復(fù)位端pause為暫停端co為進(jìn)位信號(hào)輸出端qh:毫秒信號(hào)的高位輸出端ql:毫秒信號(hào)的低位輸出端(3)VHDL源程序libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entitym60_minisport(reset:instd_logic;pause:instd_logic;ci:instd_logic;qh:bufferstd_logic_vector

14、(3downto0);ql:bufferstd_logic_vector(3downto0);endm60_min;architecturebehaveofm60_minisbeginprocess(reset,pause,ci)beginif(reset=0)thenqh=0000;ql=0000;elsif(pause=0)thenqh=qh;ql=ql;elsif(cieventandci=1)thenif(ql=1001)thenql=0000;if(qh=0101)thenqh=0000;elseqh=qh+1;endif;elseqlq_showv=1111110;when0001

15、=q_showv=0110000;when0010=q_showq_showq_showq_showq_showq_showq_showq_shownull;endcase;endprocess;endbehave;（4）仿真結(jié)果Jith-roi仙回drI133Jith-roi仙回drI133MQ”勉EldnxI:（xmIhki:Imidkm2aiyurnoin3ioooTimiIiffiicXull10_r1_j1iiipJijBJUlIdDjjLLijOnIiLLiiKiHi.伽LjLOdiXLXidiniLHi劇LijjLLIJ.illXiLIXdHLilXLLijD|.J11：iii1

16、bikit1111陽(yáng)說(shuō)明：隨著adr的值增加，q_show輸出相應(yīng)的值，數(shù)碼管相應(yīng)的段會(huì)亮，證明模塊是正確的四、數(shù)字秒表整體組裝1、頂層原理圖1.工作情況輸入信號(hào)經(jīng)過(guò)分頻器輸給計(jì)時(shí)模塊，計(jì)時(shí)模塊的各位輸給選擇(CHOICE)模塊，選擇模塊選擇輸出，再經(jīng)過(guò)轉(zhuǎn)碼(BCD_7)模塊控制數(shù)碼管段的亮滅；輸入信號(hào)的另一路經(jīng)過(guò)分頻器給掃描(SEL)模塊，SEL的輸出信號(hào)一方面給CHOICE模塊提供提供選擇信號(hào)，另一方面又給譯碼器(decode3_8)模塊提供譯碼信號(hào)來(lái)控制燈位的亮滅。，pause和reset分別控制暫停和復(fù)位。2模塊間的連接關(guān)系:掃描(SEL)模塊的輸出端接譯碼(decode3_8)模塊和選擇(CHOICE)模塊，計(jì)時(shí)模塊接選擇(CHOICE)模塊，選擇(CHOICE)模塊將選到的信號(hào)給轉(zhuǎn)碼(BCD_7模塊控制數(shù)碼管段的亮滅2、仿真結(jié)果說(shuō)明：輸入信號(hào)后，數(shù)碼管會(huì)不停的被掃描，段和位會(huì)選擇亮，可以證明模塊的正確性管腳分配