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第一章測試Thenumberofvaluesthatcanbeassignedtoabitare(
)
A:three
B:ten
C:two
D:one
答案:CComparedtoanalogsystems,digitalsystems(
)
A:
alloftheabove
B:
canrepresentaninfinitenumberofvalues
C:canhandlemuchhigherpower
D:arelesspronetonoise
答案:DThetermbitmeans(
)
A:a1ora0
B:binarydigit
C:asmallamountofdata
D:
bothanswers(b)and(c)
答案:DAquantityhascontinuousvalueis(
)
A:adigitalquantity
B:abinaryquantity
C:ananalogquantity
D:anaturalquantity
答案:CVerilogHDLisa(
)
A:
hardware
B:computerlanguage
C:logicdevice
D:programminglogicdevice
答案:BAcategoryofdigitalintegratedcircuitshavingfunctionsthatcanbealteredisknownasfixed-functionlogic.
A:對
B:錯
答案:BDataareinformationonlyinnumeric.
A:錯
B:對
答案:ATwobroadtypesofdigitalintegratedcircuitsarefixed-functionandprogrammble.
A:錯
B:對
答案:BThenonrecurringengineering(NRE)costforanASICdesignisnormallylow.
A:對
B:錯
答案:BThereisan“invalid”regionbetweentheinputrangesforlogic0andlogic1
A:錯
B:對
答案:B第二章測試Forthebinarynumber10000,theweightofthecolumnwiththe1is(
)
A:8
B:10
C:
4
D:16
答案:DThe2’scomplementof1000is(
)
A:0111
B:1010
C:1000
D:1001
答案:CThefractionalbinarynumber0.11hasadecimalvalueof(
)
A:?
B:noneoftheabove
C:
?
D:
?
答案:AThenumber1100inBCDis(
)
A:
equaltodecimaleight
B:equaltodecimaltwelve
C:invalid
D:equaltodecimalten
答案:CAnexampleofanunweightedcodeis(
)
A:Graycode
B:BCD
C:decimal
D:binary
答案:AAnexampleofanalphanumericcodeis(
)
A:CRC
B:ASCII
C:hexadecimal
D:BCD
答案:BTheoverflowoccurswhenaddingthefollowing8-bittwo’scomplementnumber:01011101+00110001
A:對
B:錯
答案:ATheoverflowdoesNOToccurwhenaddingthefollowing8-bittwo’scomplementnumber:10111111+11011111
A:對
B:錯
答案:AIngeneral,weneedatmostbitstoexpresstheproductwhenmultiplyingann-bitnumberbyanm-bitnumber.
A:錯
B:對
答案:AAnadditionoverflowsiftheaddends’signsarethesamebutthesum’ssignisdifferentfromtheaddends’.
A:對
B:錯
答案:A第三章測試TheBooleanexpressionA
.
1isequalto(
).
A:A
B:B
C:0
D:1
答案:ATheBooleanexpressionA
+1isequalto(
).
A:1
B:B
C:A
D:0
答案:ATheBooleanequationAB+AC=A(B+C)illustrates(
)
A:DeMorgan’stheorem
B:thedistributionlaw
C:
theassociativelaw
D:
thecommutativelaw
答案:BTheassociativelawforadditionisnormallywrittenas(
)
A:AB=BA
B:A+AB=A
C:
(A+B)+C
=A
+(B+C)
D:A+B=B+A
答案:CABooleanexpressionthatisinstandardSOPformis(
)
A:theminimumlogicexpression
B:containsonlyoneproductterm
C:haseveryvariableinthedomainineveryterm
D:noneoftheabove
答案:CAdjacentcellsonaKarnaughmapdifferfromeachotherby
A:threevariables
B:
onevariable
C:twovariables
D:answerdependsonthesizeofthemap
答案:BSOPstandardformisusefulforconstructingtruthtablesorforimplementinglogicinPLDs.
A:錯
B:對
答案:BLogicsimplificationisstillusefulinnowadaysFPGAdesigns.
A:錯
B:對
答案:AInsynthesis,anetlistwillbegeneratedtodescribethecircuitcompletely.
A:對
B:錯
答案:AInFPGAdesign,thestepthat“maps”thedesignfromthenetlisttofitittoatargetdeviceisknownas“programming”.
A:對
B:錯
答案:B第四章測試The74138decodercanalsobeusedas(
).
A:
anencoder
B:noneoftheabove
C:
aMUX
D:aDEMUX
答案:DAssumeyouwanttodecodethebinarynumber0011withanactive-LOWdecoder.Themissinggateshouldbe(
).
A:
anANDgate
B:anORgate
C:aNORgate
D:aNANDgate
答案:DToexpanda2-bitparalleladdertoa4-bitparalleladder,youmust(
).
A:usetwo2-bitadderswithnointerconnections
B:usetwo2-bitadderswiththecarryoutputofoneconnectedtothecarryinputoftheother
C:usetwo2-bitaddersandconnectthesumoutputsofonetothebitinputsoftheother
D:usefour2-bitadderswithnointerconnections
答案:BIfanhex-to-binarypriorityencoderhasits0,3,6,and14inputsattheactivelevel,theactive-HIGHbinaryoutputis(
).
A:0110
B:0011
C:0000
D:1110
答案:DThecontinuousassignmentassignOUT=
select?A:B;specifiestheconditionthatOUT=
()
ifselect=
1,elseOUT=
()
ifselect=
0.
A:
0,1
B:1,0
C:
A,B
D:B,A
答案:CConsidertheinitial
blockinthefollowing:initialbeginA=0;B=0;#10A=1;#20A=0;B=1;EndThenatt=30,Ais
changedto(
)andBto(
).
A:
1,1
B:0,1
C:1,0
D:0,0
答案:BTheinitialstatementexecutesonlyonce,startingfrom
simulationtime0,andmaycontinuewithanyoperationsthataredelayedbyagiven
numberoftimeunits.
A:錯
B:對
答案:BInVerilogHDL,thedefinitionsofmodulesareallowedtobenested.
A:對
B:錯
答案:BThevaluezrepresentsanunknownlogicvalueinVerilogHDL.
A:錯
B:對
答案:AInVerilogHDL,~(1010)is(0101),and!(1010)is0.
A:對
B:錯
答案:A第五章測試
TheoutputofaDlatchwillnotchangeif(
).
A:Enableisnotactive
B:alloftheabove
C:DisLOW
D:
theoutputisLOW
答案:ATheDflip-flopshownwill(
).
A:resetonthenextclockpulse
B:setonthenextclockpulse
C:toggleonthenextclockpulse
D:latchonthenextclockpulse
答案:CFortheJ-Kflip-flopshown,thenumberofinputsthatareasynchronousis(
).
A:2
B:4
C:1
D:3
答案:AAssumetheoutputisinitiallyHIGHonaleadingedgetriggeredJ-Kflipflop.Fortheinputsshown,theoutputwillgofromHIGHtoLOWonwhichclockpulse?
A:3
B:4
C:1
D:2
答案:AThetimeintervalillustratediscalled(
).
A:set-uptime
B:tPLH
C:holdtime
D:tPHL
答案:BTheadvantageofdynamicRAMoverstaticRAMisthat(
).
A:itdoesnotrequirerefreshing
B:itismuchfaster
C:alloftheabove
D:itissimplerandcheaper
答案:DAnasynchronous
resetsignalwilloverridetheclockonaFF.
A:對
B:錯
答案:AInVerilogHDL,aninitialbehavioralstatementexecutesonlyonce.
A:對
B:錯
答案:AInaMoore
model,theoutputsofthesequentialcircuitarenotsynchronizedwiththe
clock.
A:對
B:錯
答案:BTheoutputoftheMealy
machineisthevaluethatispresentimmediatelybeforethe
activeedgeoftheclock.
A:錯
B:對
答案:B第六章測試TocauseaDflip-floptotoggle,connectthe(
).
A:clocktotheD
input
B:clocktothepresetinput
C:
D:
Q
outputtotheD
input
答案:CA4-bitbinarycounterhasaterminalcountof(
).
A:15
B:16
C:10
D:4
答案:AAssumetheclockfora4-bitbinarycounteris80kHz.Theoutputfrequencyofthefourthstage(Q3)is(
).
A:320kHz
B:5kHz
C:10kHz
D:20kHz
答案:BA4-bitparallel-in/parallel-outshiftregisterwillstoredatafor(
).
A:3clockperiods
B:1clockperiod
C:4clockperiods
D:2clockperiods
答案:BAnadvantageofaringcounteroveraJohnsoncounteristhattheringcounter(
).
A:allowsonlyonebittochangeatatime
B:hasmorepossiblestatesforagivennumberofflip-flops
C:isclearedaftereachcycle
D:isself-decoding
答案:DApossiblesequencefora4-bitringcounteris(
).
A:…0000,0001,0010…
B:…1111,1110,1101…
C:
…0001,0011,0111…
D:
…1000,0100,0010…
答案:DAdivide‐by‐N-counterisacounterthatgoesthrougharepeated
sequenceofNstates,anditisalsoknownasamodulo‐Ncounter.
A:對
B:錯
答案:AForcounterswithunusedstates,itisnecessarytoensurethatthecircuiteventuallygoesintooneofthevalidstatessothatitcanresumenormaloperation.
A:對
B:錯
答案:AFortransmission,datafromaUARTissentin
synchronousparallelform.
A:錯
B:對
答案:AThemaximummodulusofacounteris,
wherenisthenumberofstages(flip-flops)inthecounter.
A:錯
B:對
答案:A第七章測試StaticRAMis(
).
A:volatileread/writememory
B:
nonvolatileread/writememory
C:volatilereadonlymemory
D:nonvolatilereadonlymemory
答案:AAnonvolatilememoryisonethat(
)
A:mustberefreshedregularly
B:alloftheabove
C:
retainsdatawithoutpowerapplied
D:
requiresaclock
答案:CTheadvantageofdynamicRAMoverstaticRAMisthat(
).
A:itissimplerandcheaper
B:itdoesnotrequirerefreshing
C:itismuchfaster
D:alloftheabove
答案:AA4-bitparallel-in/parallel-outshiftregisterwillstoredatafor(
).
A:2clockperiod
B:4clockperiod
C:3clockperiod
D:1clockperiod
答案:DWhendataisreadfromRAM,thememorylocationis(
).
A:settoall1’safterthereadoperation
B:unchanged
C:destroyed
D:clearedafterthereadoperation
答案:BThefirststepinareadorwriteoperationforarandomaccessmemoryisto(
).
A:placeavalidaddressontheaddressbus
B:enablethememory
C:startarefreshcycle
D:
sendorobtainthedata
答案:AAddressmultiplexingcanreducethenumberofpinsintheICpackage.
A:對
B:錯
答案:AOneofthemajorapplicationsofSRAMsisincachememoriesincomputers.
A:錯
B:對
答案:BRAMisusedinacomputerto
storetheBIOS(BasicInput/Output
System.
A:對
B:錯
答案:BMemoryexpansion
isaccomplishedbyaddinganappropriatenumberofmemorychipstotheaddress,data,
andcontrolbuses.
A:錯
B:對
答案:B第八章測試Thenumberofcomparatorsrequiredina10-bitflashADCis(
).
A:511
B:255
C:4095
D:1023
答案:DIfananti-aliasingfilterisnotusedindigitizingasignaltherecoveryprocess(
)
A:isslowed
B:mayincludealiassignals
C:alloftheabov
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