案例成果ni培訓(xùn)lesson introduction to labview fpga

Lesson

1Introduction

to

LabVIEW

FPGAIntroduction

to

FPGA

TechnologyLabVIEW

FPGA

System

ComponentsLabVIEW

FPGA

ApplicationsA.

Introduction

to

FPGA

TechnologyWhat

it

isA

silicon

chip

with

unconnected

gatesEnables

user

to

define

and

re-define

functionalityHow

it

worksDefines

behavior

in

softwareCompiles

and

download

to

the

hardwareWhen

it

is

usedCustom

hardware

or

ICs,

replacement

for

ASICsReconfiguration

required

after

deploymentB.

LabVIEW

FPGA

System

ComponentsLabVIEW

FPGA

Module

Software

for

developing

VIsfor

FPGA

target

VIs

for

host

PC

interactionwith

FPGA

targetLabVIEW

FPGA

Enabled

Hardware

Plug-In

Reconfigurable

I/O

(RIO)boards

CompactRIO

Modular

ReconfigurableI/O

SystemCompact

Vision

SystemIF-RIOComponents

of

a

Measurement

SystemLabVIEWNI-DAQmxA

traditional

system

consists

of

threecomponentsApplication

software

on

the

computer

(LabVIEW)

Driver

software

to

interface

to

the

hardware(NI-DAQmx)The

I/O

hardware

(M

Series

MIO)

M

SeriesDeviceLabVIEW

FPGA-Based

MeasurementSystemLabVIEWFPGAInterfaceNI-RIOApplication

software

on

the

computer

(LabVIEW)User-defined

hardware

functionality

(LabVIEW

FPGA)

Driver

software

to

interface

to

LabVIEW

on

the

device(NI-RIO)Reconfigurable

I/O

hardware

(R

Series)R

Series

DeviceFPGALabVIEW

FPGA

VICompact

VisionSystemIF-RIOPXI

R

Series

PCI

R

SeriesIntelligent

DAQ

Intelligent

DAQCompactRIOLabVIEW

FPGA

TargetsTraditional

Approach

to

CustomHardwareHardware

Design

Prototype

ABuild/Test

Prototype

BBuild/Test

SoftwareDesign/CodingSoftware

Testing

SystemTesting/CertificationNI

Approach

to

Custom

HardwareHardware

Design

Prototype

ABuild/Test

Prototype

BBuild/Test

SoftwareDesign/CodingSoftware

Testing

SystemTesting/CertificationC.

LabVIEW

FPGA

ApplicationsApplications

Driving

Need

for

Custom

HardwareIntelligent

DAQUltra-highspeedcontrolSpecialized

communication

protocolsSensor

level

signal

processingOff-load

CPU

–

CoprocessingBenefits

of

FPGA

Logic

in

LabVIEW

Multi-loop

analog

PID

loop

rates

exceed

100

kHzon

embedded

RIO

FPGA

hardware

Single-cycle

Timed

Loops

execute

at

the

rateof

the

selected

FPGA

clock

Due

to

parallel

processing

ability,

addingcomputation

does

not

necessarily

reduce

thespeed

of

the

FPGA

applicationBenefits

of

FPGA

Logic

with

LabVIEW(continued)True

simultaneous

parallel

implementation

ofF

=

(A

+

B)C

and

Z

=

X+

Y

+

Min

separate

gates

on

anFPGAIntelligent

DAQPossible

Intelligent

applicationsBuilt-in

IP

Processing

BlocksCustom

Timing

and

SynchronizationCustom

ClocksPulse-Width

ModulationCustom

CountersCustom

Analog

TriggeringMultiple

Scan

RatesCustom

Analog

I/ODigital

Communication

Protocols/ipnet

to

FPGA

can

create/readalmost

any

communicationprotocol

Many

protocols

alreadycreated

by

otherdevelopers

Refer

tofind

code1

1

0

0

1

0

1

1

0

1

0

0

1

1

0

1ClockDataChipSelect*Demonstration:

IPNetNavigate

to

/ipnet.Find

a

VI

related

to

a

communication

protocol

ofchoice,download

the

VI,

and

examine

how

the

VI

works.Decision

Making

in

SoftwareTraditional

SystemI/OOperating

SystemDriver

APIApplication

SoftwareCalculation~25

msResponseOutputsUUTCrash

PossibleDecision

Making

in

HardwareI/OOperating

SystemDriver

APIApplication

SoftwareCalculation25

ns*ResponseUUTOutputs*

Faster

response

for

80

and

120

MHz

clocksHighestLabVIEW

FPGA

SystemReliabilityAnalog

Control

Over

40

kHzLabVIEW

Real-TimeSingle

PID

40

kHzLabVIEW

FPGAPID

at

over

100

kHzOff-Loading

Processing

from

CPUHardware-in-the-loopSensor

simulationCam

and

crankLVDTsEncoding/decoding

sensorsTachometersPWMQuadrature

EncodersLVDT

SimulationQuadrature

EncoderQuiz

FPGAs

completelyreplace

the

needfor

ASICS.TrueFalse

It

is

usually

fastestto

develop

protocolsby

yourself

andthen

to

look

onlineto

see

if

you

wereright.TrueFalseQuiz3.

FPGA

applic