外文翻譯-AT89C52單片機(jī)的介紹

中文4800字附錄3：外文翻譯AT89C52monolithicintegratedcircuitintroductionAT89C52isthelowvoltagewhichAmericanATMELCorporationproduces,thehighperformanceCMOS8monolithicintegratedcircuits,internalmayrepeatedlyscratchread-onlyprogrammemory(PEROM)and256bytesrandomaccessdata-carrierstorage(RAM)including8kbyteswhichwrites,thecomponentusesATMELCorporationthehighdensity,thenon-volatilitymemorytechnologyproduction,iscompatiblewiththestandardMCS-51commandsystemand8052productpins,internalsetsatgeneral8centralprocessor(CPU)andtheFlashmemorycell,thefunctionformidableAT89C52monolithicintegratedcircuitsuitsinmanycomparativelypluralityofcontrolsapplicationsituation.Mainperformanceparameter:ArecompletelycompatiblewiththeMCS-51productinstructionandthepinThe8kbytemayagainscratchwritesFlashtododgethefastmemory1000timesscratchesthewritecycleEntirestaticoperation:0Hz—24MHzThreelevelofencryptionprogrammemory256×8InbyteRAM32programmableI/Omouthline316fixedtime/counters8interruptsourcesProgrammableserialUARTchannelThelowpowerlossidleandfallstheelectricitypatternFunctioncharacteristicoutline:BelowAT89C52providesthestandardfunction:8kbyteFlashdodgesthefastmemory,256byteinternalRAM,32I/Omouthline,316fixedtime/counters,6vectortwolevelofinterruptstructures,Afull-duplexserialpassesunguardedly,internaloscillatorandclockelectriccircuit.Atthesametime,AT89C52mayfalltothe0HZstaticstatelogicaloperation,andsupportstheelectricitysavingworkingpatternwhichtwokindofsoftwaresmayelect.TheidlewaystopsCPUthework,butpermitsRAM,fixedtime/thecounter,serialpassesunguardedlyandtheinterruptionsystemcontinuestowork.FallstheelectricitywaytopreserveinRAMthecontent,buttheoscillatorknockoffandforbidsotherallpartworktorepositionuntilthenexthardware.ThepinfunctionshowsVcc:SupplyvoltageGND:GroundingP0mouth:TheP0mouthisonegroupof8leaksleadsthewayextremelythebidirectionalI/Omouth,alsoistheaddress/databusmultiplyingmouth.Asoutletwithwhen,eachpotentialenergyabsorptioncurrentwayactuates8TTLlogicgate,whenwrites“1”toportP0,maytakethehighimpedanceinputenduses.Whenvisitsexteriordata-carrierstorageortheprogrammemory,whenthisgroupofmouthlinesegmenttransformstheaddress(low8)andthedatabusmultiplying,pullstheresistanceinthevisitactivationinterior.WhenFlashprogramming,P0mouthreceiveinstructionbyte,butwhenprogramcheck,whenoutputorderbyte,verification,outsidetherequestjoinspullstheresistanceP1mouth:P1isinabeltinteriorpullstheresistance8bidirectionalI/Omouth,theP1outputbuffermayactuate(absorptionoroutputcurrent)4TTLlogicgate.Writes“1”totheport,pullstheresistancethroughinternalontopulltheporttothehighlevel,thistimemaymaketheinputport.Whenmakestheinputportuse,becauseininternalexistencepullstheresistance,somepinispulledlowlybyexteriorsignalwhencanoutputelectriccurrent(IIL).Withat89C51similarityis,P1.0andP1.1alsomaytakeseparatelyfixedtime/thecounter2exteriorcountingsinputs(P1.0/T2)andinputs(P1.1/T2EX),seealsotable1.Flashprogrammingandprogramcheckperiod,P1receivesthelow8bitaddress.Table1P1.0andP1.1secondfunctionPinnumberFunctioncharacteristicP1.0T2(fixedtime/counter2exteriorcountingpulseinput),theclockoutputsP1.1T2EX(fixedtime/counts2capture/heavyloadingtriggeringanddirectionalcontrol)P2mouth:P2isonehasintheinteriortopulltheresistance8bidirectionalI/Omouth,theP2outputbuffermayactuate(absorptionoroutputcurrent)4TTLlogicgate.Writes“1”toportP2,pullstheresistancethroughinternalontopulltheporttothehighlevel,thistimemaymaketheinputport,whenmakestheinputportuse,becauseininternalexistencepullstheresistance,somepinispulledlowlybyexteriorsignalwhencanoutputelectriccurrent(IIL).Whenvisitsexteriorprogrammemoryor16bitaddressexteriordata-carrierstorage(e.g.carriesouttheMOVX@DPTRinstruction),theP2mouthsendsoutthehigh8bitaddressdata.Whenvisits8bitaddressesexteriordata-carrierstorage(forexamplecarriesouttheMOVX@RIinstruction),theP2mouthoutputstheP2latchthecontentWhenFlashprogrammingorverification,P2alsoreceivesthetopdigitaddressandsomecontrolsignal.P3mouth:TheP3mouthisagrouphasintheinteriortopulltheresistance8bidirectionalI/Omouth.TheP3mouthoutputbuffermayactuate(absorptionoroutputcurrent)4TTLlogicgate.Readsin“1”whentotheP3mouth,theythepositionresistancearepulledbytheinteriorinGaoBingketheachievementtoinputtheport.Thistime,willbepulledbytheoutsidethelowP3mouthtousetopullresistanceoutputcurrent(IIL).TheP3mouthbesidestookthegeneralI/Omouthline,amoreimportantuseisitssecondfunction,thefollowingtableshows:PortpinSecondfunctionP3.0RXD(serialinputport)P3.1TXD(serialoutlet)P3.2INT0(outsideinterrupts0)P3.3INT1(outsideinterrupts1)P3.4T0(fixedtime/counter0)P3.5T1(fixedtime/counter1)P3.6WR(exteriordata-carrierstoragewritesselection)P3.7RD(exteriordata-carrierstoragereadsselection)Inaddition,theP3mouthalsoreceivessometouseinFlashdodgingthefastmemoryprogrammingandtheprogramcheckcontrolsignal.RST:Replacementinput.Whentheoscillatorworks,theRSTpinwillappearabovetwomachinecyclesthehighleveltocausethemonolithicreplacement.ALE/PROG:Whenvisitsexteriorprogrammemoryorthedata-carrierstorage,ALE(addresslocksavespermission)tooutputthepulsetouseinthelocksavingtheaddressthelow8bytes.Inordinarycircumstances,ALEstillbyclockoscilationfrequency1/6outputfixedpulsesignal,thereforeitmaytheforeignoutputclockorusesinfixedtimethegoal.Mustpayattention:Whenvisitsexteriordata-carrierstoragewilljumpoveraALEpulse.ToFlashmemoryprogrammingperiod,thispinalsousesininputtingprogrammingpulse(PROG).Ifhasthenecessity,maythroughtoinspecialfunctionregister(SFR)area8EHtheunitD0positionposition,bepossibletoforbidtheALEoperation.Afterthispositionposition,onlythenMOVXandtheMOVCinstructioncanactivateALE.Inaddition,thispincanpullweaklyhigh,whenthemonolithicintegratedcircuitcarriesoutexteriorprocedure,shouldestablishtheALEprohibitionpositiontobeinvalidPSEN:Theprocedurestoragepermitsthe(PSEN)outputisexteriorprogrammemoryreadsthegatingsignal,whenAT89C52takestheinstructionbyexteriorprogrammemory(ordata),eachmachinecycletwoPSENiseffective,namelyoutputstwopulses.Whenvisitsexteriordata-carrierstorage,willjumpovertwoRSENsignals.EA/VPP:Exteriorvisitpermission.WantstocauseCPUonlytovisitexteriorprogrammemory(addressis0000H-FFFFH),theEAendmustmaintainthelowlevel(earth).Mustpayattention:IfaddsmilLB1toprogram,whenreplacementtheinteriorcanlocksavestheEAendcondition.IftheEAend(meetstheVccend)forthehighlevel,CPUcarriesoutintheinternalprocedurememoryinstruction.WhentheFlashmemoryprograms,thispinaddson12VprogrammingpermissionpowersourceVPP,certainlythismustbethiscomponentisuses12VtoprogramvoltageVPP.XTAL1:Oscillatorinvertingamplifierandinternalclockgeneratorinputend.XTAL2:Oscillatorinvertingamplifierout-port.Specialfunctionregister:Inat89C52internalmemory,the80H-FFHaltogether128unitsforspecialfunctionregister(SFE),SFRaddressbasementreflectionasshowninTable2.Alladdressesallaredefinedbynomeans,onlythenapartisdefinedfromthe80H-FFHaltogether128bytes,butalsohasquiteapartnottodefine.Tothedefinitionunitread-writewillnothavebeenYuanXiao,theread-outvaluewillbeindefinite,butwillreadinthedatawillalsolose.Shouldnot“1”notreadinthedatathedefinitionunit,thenwillpossiblyentrustwiththenewfunctionintheseunitsinthefutureproduct,inthiscase,afterreplacementtheseunitvaluealways“0”.AT89C52besideswithAT89C51allfixedtime/counters0andfixedtime/counter1,butalsoincreasedafixedtime/counter2.Fixedtime/thecounter2controlstatusbyteislocatedT2CON、T2MOD(toseeTable4),theregisterto(RCA02H,RCAP2L)isthetimer2/automaticloadstheregisteragainunder16capturewaysor16automaticheavyloadingwaycapture.Interruptregister:AT89C52has6interruptsources,2interruptpriorities,theIEregistercontrolseachinterruptposition,intheIPregister6interruptsourceeachmaydecideas2superiordata-carrierstorages:AT89C52has256byteinternalRAM,80H-FFHhigh128bytesandthespecialfunctionregister(SFR)addressisoverlap,alsoishigh128byteRAMandthespecialfunctionregisteraddressissame,butinphysicstheyareseparated.Whenaninstructionvisitsthe7FHabovedummyhomeaddressunit,intheinstructionusestheaddressingwayisdifferent,alsoistheaddressingwaydecisionisvisitshigh128byteRAMtovisitthespecialfunctionregister.Iftheinstructionisthedirectaddressingwayforthevisitspecialfunctionregister.Forexample,followingdirectaddressinginstructionvisitspecialfunctionregister0A0H(i.e.P2mouth)addressunit.MOV0A0H,#dataTheindirectaddressinginstructionvisitshigh128byteRAM,forexample,infollowingindirectaddressinginstruction,theR0contentis0A0H,thenthevisitdatabyteaddressis0A0H,butisnottheP2mouth(0A0H).MOVthe@R0,#datastorehouseoperationalsoistheindirectaddressingway,therefore,high128bitdataRAMalsomaytakethestorehouseareause.Timer0andtimer1:TheAT89C52timer0andthetimer1workingandAT89C51aresame.Timer2:Thetimer2is16fixedtime/counters.Italreadymaywhentimeruse,alsomaytaketheexternaleventcounteruse,itsworkingchoosesbythespecialfunctionregisterT2CONC/T2position.Thetimer2hasthreeworkings:Thecaptureway,theautomaticheavyloading(upwardordownwardcounting)thewayandthebaudrategeneratorway,theworkingchoosesbytheT2CONcontrolposition,seealsotable4.Table4timer2workingsPCLK+TCLKCP/RL2TR2MODE00116-bit

Auto-reload01116-bit

Capture1×1Baud

Rate

Generator××0（Off）Thetimer2iscomposedbytwo8registerTH2andTL2,inthetimerworking,eachmachinecycleTL2registervalueadds1,becauseamachinecyclevibratestheclockconstitutionby12,therefore,countingspeedforoscilationfrequency1/12.Whencountingworking,whenontheT2pinexteriorinputsignalproducesby1to0dropsalong,theregistervalueadds1,underthisworking,eachmachinecycle5SP2period,carriesonthesamplingtoexteriorinput.Ifpicksinthefirstmachinecyclethevalueis1,butthevaluewhichpicksinthenextmachinecycleis0,thenisfollowingcloseonthenextcyclicalS3P1periodregisteradds1.Becausedistinguishes1toneed2machinecyclesto0jumps(24durationsofoscillation),therefore,highestcountingspeedforoscilationfrequency1/24.Inordertoguaranteethesamplingtheaccuracy,therequestinputlevelmaintainsatleastbeforethechangeforacompletecyclicalthetime,guaranteestheinputsignalatleastbysamplingonetime.Captureway:Underthecaptureway,choosestwowaysthroughT2CONcontrolpositionEXEN2.IfEXEN2=0,thetimer2is16timersorthecounter,whencountingoverflow,totheT2CONoverflowsymbolizedTF2setsattheposition,simultaneouslyactivatestheinterrupt.IflooksupEXEN2=1,thetimer2completesthesameoperation,ButwhentheT2EXpinexteriorinputsignalhas1to0negativejumps,alsoappearsinTH2andtheTL2valueiscaughtseparatelytoinRCAP2HandRCAP2L.Moreover,theT2EXpinsignaljumpcausesinT2CONEXF2tosetattheposition,issimilarwithTF2,EXF2alsocaninterruptexactly.CapturewayasshowninFigure4.Automaticheavyloading(upwardordownwardcounter)way:Whentimer2workin16automaticheavyloadingways,cantoitsprogrammingforupwardorthedownwardcountingway,thisfunctionmay(seeTable5)throughspecialfunctionregisterT2CONtheDCENposition(permissiondownwardcounting)choose.Whenreplacement,theDCENposition“0”,thetimer2defaultsestablishesastheupwardcounting.WhenDCENsetsattheposition,thetimer2alreadymaycountupwardlyalsomaythedownwardcounting,thisisdecidedbytheT2EXpinvalue,seealsoFigure5,whenDCEN=0,thetimer2automaticsetupsfortheupwardcounting,underthisway,intheT2CONEXEN2controlpositionhavetwokindofchoices,ifEXEN2=0,thetimer2fortheupwardcountingtothe0FFFFHoverflow,setsatthepositionTF2activationinterrupt,simultaneously16counterregisterRCAP2HandtheRCAP2Lheavyloading,RCAP2HandtheRCAP2Lvaluemaybythesoftwareinitialization.WhenDCENsetsattheposition,thetimer2alreadymaycountupwardlyalsomaythedownwardcounting,thisisdecidedbytheT2EXpinvalue,seealsoFigure5,whenDCEN=0,thetimer2automaticsetupsfortheupwardcounting,underthisway,intheT2CONEXEN2controlpositionhavetwokindofchoices,ifEXEN2=0,thetimer2fortheupwardcountingtothe0FFFFHoverflow,setsatthepositionTF2activationinterrupt,simultaneously16counterregisterRCAP2HandtheRCAP2Lheavyloading,RCAP2HandtheRCAP2Lvaluemaybythesoftwareinitialization.Baudrategenerator:WhenT2CON(Table3)TCLKandRCLKsetattheposition,fixedtime/thecounter2takesthebaudrategeneratoruse.Iffixedtime/thecounter2tookthetransmitterorthereceiver,itstransmissionandthereceivebaudratemaybedifferent,thetimer1usesinotherfunctions,asshowninFigure7.IfRCLKandTCLKsetattheposition,thentimer2workinbaudrategeneratorway.Thebaudrategeneratorwayandtheautomaticheavyloadingwayaresimilar,underthisway,theTH2turnovercausesthetimer2registersisimportantthenewloadingwithinRCAP2HandtheRCAP2L16figures,thisvalueestablishesbythesoftware.Intheway1andthewayin3,thebaudratedeterminedbythetimer2overflowspeedsaccordingtotheequationbelowthat,Way1and3baudrate=timeroverflowrate/16Thetimeralreadycanworkinfixedtimethewayalsocanworkinthecountingway,inthemajorityapplications,istheworkinfixedtimetheway(C/T2=0).Thetimer2tookwhenbaudrategenerator,withasthetimeroperationisdifferent,whenusualachievementtimer,(1/12oscilationfrequency)checksthevalueineachmachinecycletoadd1,buttookwhenbaudrategeneratoruse,(1/2oscilationfrequency)theregistervalueadds1ineachconditiontime.Thebaudrateformulaisasfollows:Theway1and3baudrate=oscilationfrequency/{32×[65536-(RCAP2H,RCAP2L)]}intheformula(RCAP2H,RCAP2L)isinRCAP2HandRCAP2L16doesnothavethesigndigit.Thetimer2tookthebaudrategeneratoruseelectriccircuitasshowninFigure7.InwhenT2CONRCLKorTCLK=1,thebaudrateworkingonlytheniseffective.Inthebaudrategeneratorworking,theTH2turnovercannotcauseTF2tosetattheposition,thereforedoesnothavetheinterrupt.ButifEXEN2setsattheposition,alsotheT2EXendproducesby1to0negativejumps,thencancauseEXF2tosetattheposition,thistimecannotload(RCAP2H,RCAP2L)contentinTH2andTL2.Therefore,whenthetimer2takesthebaudrategeneratoruse,T2EXmayuseastheadditionalexteriorinterruptsource.Needstopayattention,whentimer2workinbaudrate,whenmoves(TR2=1)asthetimer,cannotvisitTH2andTL2.Becausethistimeeachconditiontimetimercanadd1,toitsread-writewillobtainaindefinitevalue.Buthowever,mayreadtoRCAP2cannotwrite,becausethewriteoperationwillbethereload,thewriteoperationpossiblycommandwriteswith/ortheheavyloadingmakesamistake.Invisitstimer2orinfrontoftheRCAP2register,should(eliminatethetimerclosureTR2).Theprogrammableclockoutputs:Thetimer2mayoutputadutyfactorthroughtheprogrammingfromP1.0is50%clocksignal,asshowninFigure8.TheP1.0pinbesidesisastandardI/Omouth,butalsomaycauseitthroughtheprogrammingtotakefixedtime/thecounter2exteriorclockinputsandtheoutputdutyfactor50%clockpulse.Whentheclockoscilationfrequencyis16MHz,outputstheclockfrequencyrangeis61Hz-4MHz.Whenestablishesfixedtime/thecounter2astheclockgenerator,C/T2(T2CON.1)=0,T2OE(T2MOD.1)=1,mustorstopsthetimerbyTR2(T2CON.2)start.Theclockoutputfrequencyisdecidedintheoscilationfrequencyandthetimer2catchestheregister(RCAP2H,RCAP2L)reloadvalue,theformulaisasfollows:Theoutputclockfrequency=oscillatorfrequency/{4×[65536-(RCAP2H,RCAP2L)]}undertheclockoutputway,thetimer2turnovercannothavetheinterrupt,thischaracteristicwithtookwhenbaudrategeneratoruseissimilar.Whenthetimer2takesthebaudrategeneratoruse,Alsomaytaketheclockgeneratoruse,butneedstopayattentionisthebaudrateandtheclockoutputfrequencycannotseparatethedetermination,thisisbecausetheywithuseRCAP2HandRCAP2L.AT89C52單片機(jī)的介紹AT89C52是美國ATMEL公司生產(chǎn)的低電壓，高性能CMOS

8位單片機(jī)，片內(nèi)含8k

bytes的可反復(fù)擦寫的只讀程序存儲器（PEROM）和256bytes的隨機(jī)存取數(shù)據(jù)存儲器（RAM），器件采用ATMEL公司的高密度、非易失性存儲技術(shù)生產(chǎn)，與標(biāo)準(zhǔn)MCS－51指令系統(tǒng)及8052產(chǎn)品引腳兼容，片內(nèi)置通用8位中央處理器（CPU）和Flash存儲單元，功能強(qiáng)大AT89C52單片機(jī)適合于許多較為復(fù)雜控制應(yīng)用場合。主要性能參數(shù)：與MCS－51產(chǎn)品指令和引腳完全兼容8k字節(jié)可重擦寫Flash閃速存儲器1000次擦寫周期全靜態(tài)操作：0Hz—24MHz三級加密程序存儲器256×8字節(jié)內(nèi)部RAM32個可編程I/O口線3個16位定時/計(jì)數(shù)器8個中斷源可編程串行UART通道低功耗空閑和掉電模式功能特性概述：AT89C52提供以下標(biāo)準(zhǔn)功能：8k字節(jié)Flash閃速存儲器，256字節(jié)內(nèi)部RAM，32個I/O口線，3個16位定時/計(jì)數(shù)器，一個6向量兩級中斷結(jié)構(gòu)，一個全雙工串行通信口，片內(nèi)振蕩器及時鐘電路。同時，AT89C52可降至0HZ的靜態(tài)邏輯操作，并支持兩種軟件可選的節(jié)電工作模式?？臻e方式停止CPU的工作，但允許RAM，定時/計(jì)數(shù)器，串行通信口及中斷系統(tǒng)繼續(xù)工作。掉電方式保存RAM中的內(nèi)容，但振蕩器停止工作并禁止其它所有部件工作直到下一個硬件復(fù)位。引腳功能說明Vcc：電源電壓GND：地線P0口：P0口是一組8位漏極開路型雙向I/O口，也即地址/數(shù)據(jù)總線復(fù)用口。作為輸出口用時，每位能吸收電流的方式驅(qū)動8個TTL邏輯門電路，對端口P0寫“1”時，可作為高阻抗輸入端用。在訪問外部數(shù)據(jù)存儲器或程序存儲器時，這組口線分時轉(zhuǎn)換地址（低8位）和數(shù)據(jù)總線復(fù)用，在訪問期間激活內(nèi)部上拉電阻。在Flash編程時，P0口接收指令字節(jié)，而在程序校驗(yàn)時，輸出指令字節(jié)，校驗(yàn)時，要求外接上拉電阻P1口：P1是一個帶內(nèi)部上拉電阻的8位雙向I/O口，P1的輸出緩沖級可驅(qū)動（吸收或輸出電流）4個TTL邏輯門電路。對端口寫“1”，通過內(nèi)部的上拉電阻把端口拉到高電平，此時可作輸入口。作輸入口使用時，因?yàn)閮?nèi)部存在上拉電阻，某個引腳被外部信號拉低時會輸出一個電流（IIL）。與AT89C51不同之處是，P1.0和P1.1還可分別作為定時/計(jì)數(shù)器2的外部計(jì)數(shù)輸入（P1.0/T2）和輸入（P1.1/T2EX），參見表1。Flash編程和程序校驗(yàn)期間，P1接收低8位地址。表1P1.0和P1.1的第二功能引腳號功能特性P1.0T2（定時/計(jì)數(shù)器2外部計(jì)數(shù)脈沖輸入），時鐘輸出P1.1T2EX（定時/計(jì)數(shù)2捕獲/重裝載觸發(fā)和方向控制）P2口：P2是一個帶有內(nèi)部上拉電阻的8位雙向I/O口，P2的輸出緩沖級可驅(qū)動（吸收或輸出電流）4個TTL邏輯門電路。對端口P2寫“1”，通過內(nèi)部的上拉電阻把端口拉到高電平，此時可作輸入口，作輸入口使用時，因?yàn)閮?nèi)部存在上拉電阻，某個引腳被外部信號拉低時會輸出一個電流（IIL）。在訪問外部程序存儲器或16位地址的外部數(shù)據(jù)存儲器（例如執(zhí)行MOVX＠DPTR指令）時，P2口送出高8位地址數(shù)據(jù)。在訪問8位地址的外部數(shù)據(jù)存儲器（如執(zhí)行MOVX＠RI指令）時，P2口輸出P2鎖存器的內(nèi)容Flash編程或校驗(yàn)時，P2亦接收高位地址和一些控制信號。P3口：P3口是一組帶有內(nèi)部上拉電阻的8位雙向I/O口。P3口輸出緩沖級可驅(qū)動（吸收或輸出電流）4個TTL邏輯門電路。對P3口寫入“1”時，它們被內(nèi)部上位電阻拉高并可作為輸入端口。此時，被外部拉低的P3口將用上拉電阻輸出電流（IIL）。P3口除了作為一般的I/O口線外，更重要的用途是它的第二功能，如下表所示：端口引腳第二功能P3.0RXD（串行輸入口）P3.1TXD（串行輸出口）P3.2INT0（外中斷0）P3.3INT1（外中斷1）P3.4T0（定時/計(jì)數(shù)器0）P3.5T1（定時/計(jì)數(shù)器1）P3.6WR（外部數(shù)據(jù)存儲器寫選通）P3.7RD（外部數(shù)據(jù)存儲器讀選通）此外，P3口還接收一些用于Flash閃速存儲器編程和程序校驗(yàn)的控制信號。RST：復(fù)位輸入。當(dāng)振蕩器工作時，RST引腳出現(xiàn)兩個機(jī)器周期以上高電平將使單片復(fù)位。ALE/PROG：當(dāng)訪問外部程序存儲器或數(shù)據(jù)存儲器時，ALE（地址鎖存允許）輸出脈沖用于鎖存地址的低8位字節(jié)。一般情況下，ALE仍以時鐘振蕩頻率的1/6輸出固定的脈沖信號，因此它可對外輸出時鐘或用于定時目的。要注意的是：每當(dāng)訪問外部數(shù)據(jù)存儲器時將跳過一個ALE脈沖。對Flash存儲器編程期間，該引腳還用于輸入編程脈沖（PROG）。如有必要，可通過對特殊功能寄存器（SFR）區(qū)中的8EH單元的D0位置位，可禁止ALE操作。該位置位后，只有一條MOVX和MOVC指令才能將ALE激活。此外，該引腳會被微弱拉高，單片機(jī)執(zhí)行外部程序時，應(yīng)設(shè)置ALE禁止位無效PSEN：程序儲存允許（PSEN）輸出是外部程序存儲器的讀選通信號，當(dāng)AT89C52由外部程序存儲器取指令（或數(shù)據(jù)）時，每個機(jī)器周期兩次PSEN有效，即輸出兩個脈沖。在此期間，當(dāng)訪問外部數(shù)據(jù)存儲器，將跳過兩次RSEN信號。EA/VPP：外部訪問允許。欲使CPU僅訪問外部程序存儲器（地址為0000H－FFFFH），EA端必須保持低電平（接地）。需注意的是：如果加密位LB1被編程，復(fù)位時內(nèi)部會鎖存EA端狀態(tài)。如EA端為高電平（接Vcc端），CPU則執(zhí)行內(nèi)部程序存儲器中的指令。Flash存儲器編程時，該引腳加上+12V的編程允許電源VPP，當(dāng)然這必須是該器件是使用12V編程電壓VPP。XTAL1：振蕩器反相放大器的及內(nèi)部時鐘發(fā)生器的輸入端。XTAL2：振蕩器反相放大器的輸出端。特殊功能寄存器：AT89C52片內(nèi)存儲器中，80H－FFH共128個單元為特殊功能寄存器（SFE），SFR的地址窨映象如表2所示。并非所有的地址都被定義，從80H－FFH共128個字節(jié)只有一部分被定義，還有相當(dāng)一部分沒有定義。對沒有定義的單元讀寫將是元效的，讀出的數(shù)值將不確定，而寫入的數(shù)據(jù)也將丟失。不應(yīng)將數(shù)據(jù)“1”寫入未定義的單元，則于這些單元在將來的產(chǎn)品中可能賦予新的功能，在這種情況下，復(fù)位后這些單元數(shù)值總是“0”。AT89C52除了與AT89C51所有的定時/計(jì)數(shù)器0和定時/計(jì)數(shù)器1外，還增加了一個定時/計(jì)數(shù)器2。定時/計(jì)數(shù)器2的控制狀態(tài)位位于T2CON、T2MOD（見表4），寄存器對（RCA02H、RCAP2L）是定時器2在16位捕獲方式或16位自動重裝載方式下的捕獲/自動重裝載寄存器。中斷寄存器：AT89C52有6個中斷源，2個中斷優(yōu)先級，IE寄存器控制各中斷位，IP寄存器中6個中斷源的每一個可定為2個優(yōu)數(shù)據(jù)存儲器：AT89C52有256個字節(jié)的內(nèi)部RAM，80H－FFH高128個字節(jié)與特殊功能寄存器（SFR）地址是重疊的，也就是高128字節(jié)的RAM和特殊功能寄存器的地址是相同的，但物理上它們是分開的。當(dāng)一條指令訪問7FH以上的內(nèi)部地址單元時，指令中使用的尋址方式是不同的，也即尋址方式?jīng)Q定是訪問高128字節(jié)RAM還是訪問特殊功能寄存器。如果指令是直接尋址方式則為訪問特殊功能寄存器。例如，下面的直接尋址指令訪問特殊功能寄存器0A0H（即P2口）地址單元。MOV0A0H，＃data間接尋址指令訪問高128字節(jié)RAM，例如，下面的間接尋址指令中，R0的內(nèi)容為0A0H，則訪問數(shù)據(jù)字節(jié)地址為0A0H，而不是P2口（0A0H）。MOV＠R0，＃data堆棧操作也是間接尋址方式，所以，高128位數(shù)據(jù)RAM亦可作為堆棧區(qū)使用。定時器0和定時器1：AT89C52的定時器0和定時器1的工作方式與AT89C51相同。定時器2：定時器2是一個16位定時/計(jì)數(shù)器。它既可當(dāng)定時器使用，也可作為外部事件計(jì)數(shù)器使用，其工作方式由特殊功能寄存器T2CON的C/T2位選擇。定時器2有三種工作方式：捕獲方式，自動重裝載（向上或向下計(jì)數(shù)）方式和波特率發(fā)生器方式，工作方式由T2CON的控制位來選擇，參見表4。表4定時器2工作方式PCLK+TCLKCP/RL2TR2MODE00116-bit

Auto-reload01116-bit

Capture1×1Baud

Rate

Generator××0（Off）定時器2由兩個8位寄存器TH2和TL2組成，在定時器工作方式中，每個機(jī)器周期TL2寄存器的值加1，由于一個機(jī)器周期由12個振蕩時鐘構(gòu)成，因此，計(jì)數(shù)速率為振蕩頻率的1/12