數(shù)字邏輯設(shè)計(jì)及應(yīng)用教學(xué)課件：4-4 冒險(xiǎn) 總結(jié)

1、 class exersise Using Karnaugh maps, find a minimal sum-of-products expression for each of the following logic function F. Indicate the distinguished 1-cells in each map. F = A,B,C,D ( 0, 1, 2, 3, 4, 5, 7, 14, 15 )Using Karnaugh maps, find a minimal sum-of-products expression for each of the followi

2、ng logic function F. Indicate the distinguished 1-cells in each map.F = A,B,C,D ( 0, 1, 2, 3, 4, 5, 7, 14, 15 )1、填圖2、圈組 找奇異“1”單元 圈質(zhì)主蘊(yùn)含項(xiàng) 圈其它的13、讀圖CDAB00 01 11 1000011110111111111F(A,B,C,D) = AB + AC + AD + ABCUsing Karnaugh maps, find a minimal sum-of-products expression for each of the following log

3、ic function F. Indicate the distinguished 1-cells in each map.F = A,B,C,D ( 0, 1, 2, 3, 4, 5, 7, 14, 15 )1、填圖2、圈組 找奇異“1”單元 圈質(zhì)主蘊(yùn)含項(xiàng) 圈其它的13、讀圖CDAB00 01 11 1000011110111111111F(A,B,C,D) = AB + AC + AD + ABCNot the distinguished 1-cells ExampleCDAB00 01 11 1000011110111111CDAB00 01 11 100001111011Given t

4、wo prime implicants P and Q in a reduced map, P is said to eclipse(重疊) Q. (P220)(written P Q) if P covers at least all the 1-cells covered by Q. (P220) BCD is a secondary essential prime implicant .BCDCDAB00 01 11 1000011110111111沒(méi)有奇異“1”單元沒(méi)有質(zhì)主蘊(yùn)含項(xiàng)CDAB00 01 11 1000011110111111Example1.Prime Implicant

5、Theorem : A minimal sum is a sum of prime implicants.2. A minimal sum is not the sum of all the prime-implicants.3. the sum of all the prime-implicants of a logic function is called the complete sum.（完全和） “Dont-Care” Input Combinations ( “無(wú)關(guān)”輸入組合) (P222)有時(shí)組合電路的輸出和某些輸入組合無(wú)關(guān)F = A,B,C,D(1,2,3,5,7) + d(1

6、0,11,12,13,14,15)CDAB00 01 11 1000011110dddddd11111F = AD + BCADBCd 集（d-set）Example 11. Using Karnaugh maps, find a minimal sum-of-products expression for each of the following logic function F. F=ABCD+ABC+ABCD+BCDCDAB00 01 11 1000011110111111Example 2F2= A,B,C,D(1,2,3,6,7,9,11,13,15) 111111111CDAB0

7、0 01 11 10000111100000000Example 31. Using Karnaugh maps, find a minimal products expression for each of the following logic function F. F=(AB)(B+D)(C+D)(A+C+D)(B+C+D)Example 4what is the relation between the fonction F and fonction G?F=AB+AD+BC+CDG=(ABD+AC+BCD)Example 5 if F1=ACD+ABD+BCD+ACD F2=(AC

8、D+BC+ACD),what is the F1F2,F1+F2,F1 F2?Example 6Z1=AB+BD+BCD+ABC,please express the Z1 with the minimal NAND-NAND expresstion.please express the Z1 with the minimal NOR-NOR expresstion.please express the Z1 with the minimal AOI expresstion.Z1=AB+BD+BCD+ABCCDAB00 01 11 10000111101111111111Z1=AB+BD+AC

9、D最小和：NAND-NAND expresstionZ1=（AB+BD+ACD）Z1=AB+BD+BCD+ABCCDAB00 01 11 10000111100Z1=AB+BD+ACD最小和：NAND-NAND expresstionZ1=(（AB+BD+ACD）)最小積？00000Z1=(A+B+C).(A+C+D).(A+B+D)(A+B+D)NOR-NOR expresstionZ1=(（(A+B+C).(A+C+D).(A+B+D)(A+B+D)Z1=AB+BD+BCD+ABCCDAB00 01 11 10000111101Z1=AB+BD+ACD最小和：NAND-NAND expre

10、sstionZ1=(（AB+BD+ACD）)反函數(shù)Z1？11111Z1=ABC+ACD+ABD+ABDAOI expresstionZ1=(ABC+ACD+ABD+ABD)4.4 Timing Hazards(定時(shí)冒險(xiǎn)) steady-state behavior & stransient behavior 穩(wěn)態(tài)特性 和 瞬態(tài)特性 (P224)Circuit delayhazard （冒險(xiǎn)）AAAFFglitch尖峰AA hazard is said to exist when a circuit has the possibility of producing such a glitch.

11、4.4.1 Static Hazards 靜態(tài)冒險(xiǎn) (P225)static-1 hazard 靜態(tài)-1型冒險(xiǎn)static-0 hazard 靜態(tài)-0型冒險(xiǎn)主要存在于“與或”電路中AFAFSteady state is 1. F = (AA) = A+ASteady state is 0. F = (A+A) = AA主要存在于“或與”電路中Example:when WYZ=001, F=X ;There are three passes from X to F.Dynamic hazard4.4.2 Finding Static Hazards Using Maps 利用卡諾圖發(fā)現(xiàn)靜態(tài)冒險(xiǎn)

12、(P226)ZXY00 01 11 10011 11 1若卡諾圖中，圈與圈之間有相切現(xiàn)象，則可能出現(xiàn)靜態(tài)冒險(xiǎn)。消除冒險(xiǎn)的方法： 引入額外項(xiàng)乘積項(xiàng)覆蓋冒險(xiǎn)的輸入對(duì)。F = XZ + YZ + XYstatic-1 hazard Example Indicate whether or not existence or of the static hazards occurs ?ZXY00 01 11 10011 11 1ZXY00 01 11 10011 11 1Eliminate the hazart 補(bǔ)充：競(jìng)爭(zhēng)冒險(xiǎn)（清華教材）1&AAY111AY2AAY1Y2競(jìng)爭(zhēng)：門(mén)電路兩個(gè)輸入信號(hào)同時(shí)向相反

13、的邏輯電平跳變。若后繼負(fù)載電路是一個(gè)對(duì)脈沖敏感的電路，這種尖峰脈沖可能使負(fù)載電路發(fā)生誤動(dòng)作。競(jìng)爭(zhēng)冒險(xiǎn)：由于競(jìng)爭(zhēng)而在電路輸出端可能產(chǎn)生尖峰脈沖檢查競(jìng)爭(zhēng)冒險(xiǎn)現(xiàn)象的方法 只要輸出端的邏輯函數(shù)在一定條件下能簡(jiǎn)化成Y = A + AY = AA或則可判定存在競(jìng)爭(zhēng)冒險(xiǎn)如：Y = AB +AC當(dāng) B = C = 1 時(shí)，Y = A + A ，存在競(jìng)爭(zhēng)冒險(xiǎn)又如：Y = ( A + B ) ( B + C )當(dāng) A = C = 0 時(shí)，Y = BB ，存在競(jìng)爭(zhēng)冒險(xiǎn) 采用計(jì)算機(jī)輔助分析手段 用實(shí)驗(yàn)來(lái)檢查電路輸出端是否產(chǎn)生尖峰脈沖消除競(jìng)爭(zhēng)冒險(xiǎn)現(xiàn)象的方法 接入濾波電容尖峰脈沖一般都很窄，輸出端并接一個(gè)很小的濾波電容，足以將其幅度削弱到門(mén)電路的閾值電壓以下。增加了輸出電壓波形的上升時(shí)間和下降時(shí)間，使波形變壞不是一個(gè)好辦法1&AAY1C f消除競(jìng)爭(zhēng)冒險(xiǎn)現(xiàn)象的方法 引入選通脈沖 修改邏輯設(shè)計(jì)Y = AB + AC = AB + AC + BC增加冗余項(xiàng)消除冒險(xiǎn)（可以利用卡諾圖）1&AAY1PAAY1P第四章 小結(jié)4.1 開(kāi)關(guān)代數(shù)公理、定理摩根定理對(duì)偶、反演邏輯函數(shù)的標(biāo)準(zhǔn)表示法真值表積之和、和之積標(biāo)準(zhǔn)項(xiàng)n 變量最小項(xiàng)（最大項(xiàng)）4.2 組合電路分析4.3 組合電路綜合4.5 定時(shí)冒險(xiǎn)(電路的描述與設(shè)計(jì)) Exampl