數(shù)字電子技術(shù)基礎(chǔ)八位二進(jìn)制加法器課程設(shè)計(jì)報(bào)告

經(jīng)典word整理文檔，僅參考，雙擊此處可刪除頁(yè)眉頁(yè)腳。本資料屬于網(wǎng)絡(luò)整理，如有侵權(quán)，請(qǐng)聯(lián)系刪除，謝謝！數(shù)字電子技術(shù)基礎(chǔ)八位二進(jìn)制加法器課程設(shè)計(jì)報(bào)告本次課程設(shè)計(jì)介紹了一種基于數(shù)字電子技術(shù)的八位二進(jìn)制加法器實(shí)現(xiàn)了如下功能:1、八位二進(jìn)制加數(shù)與被加數(shù)輸入2、三位數(shù)碼管顯示3、三位十進(jìn)制加數(shù)與被加數(shù)的輸入該電路系統(tǒng)主要分為八位二進(jìn)制加法器和三位十進(jìn)制加法器兩個(gè)系統(tǒng)：二進(jìn)制碼到十進(jìn)制8421BCD碼的轉(zhuǎn)換電路和三位數(shù)碼管顯示輸出4個(gè)模塊組成；三位十進(jìn)制加法器系統(tǒng)由十進(jìn)制的輸入電路、三位十進(jìn)制8421BCD碼加法運(yùn)算電路、四位數(shù)碼管顯示輸出3個(gè)模塊組成。設(shè)計(jì)過(guò)程：了相關(guān)資料與文獻(xiàn)，并參考了清華大學(xué)出版社06年版《數(shù)字電子技術(shù)基礎(chǔ)》等參考教材，進(jìn)行了資料整理以及設(shè)計(jì)構(gòu)思。隨后組員分工-十進(jìn)制BCD碼轉(zhuǎn)換系統(tǒng)電路和輸出、顯示系統(tǒng)。最后將電路模塊整合為一個(gè)整體電路系統(tǒng)，并應(yīng)用Multisim軟件進(jìn)行了設(shè)計(jì)電路圖的繪制和仿真檢驗(yàn)。前言......................................................................................................................2第一章系統(tǒng)概述....................................................................................................51.總體設(shè)計(jì)思想..................................................52.總體設(shè)計(jì)方案及選擇............................................53.系統(tǒng)框圖.....................................................114.工作原理.....................................................11第二章單元電路設(shè)計(jì)與分析...............................................................................121.三位十進(jìn)制數(shù)的加法運(yùn)算模塊...................................121.18421BCD碼編碼器原理...................................................................................131.28421BCD碼加法器原理...................................................................................131.3三位8421BCD碼加法器電路...........................................................................142.八位二進(jìn)制加法運(yùn)算模塊.......................................162.1八位二進(jìn)制的加法電路的實(shí)現(xiàn)........................................................................162.2數(shù)碼管的顯示..................................................................................................17第三章系統(tǒng)綜述、總體電路圖...........................................................................181.系統(tǒng)綜述.....................................................182.總體電路圖...................................................182.1三位十進(jìn)制數(shù)加法總電路圖...........................................................................192.2八位二進(jìn)制數(shù)加法總電路圖...........................................................................20第四章結(jié)束語(yǔ).....................................................................................................21收獲與體會(huì).........................................................................................................21鳴謝....................................................................................................................22元器件明細(xì)表....................................................................................................22參考文獻(xiàn)...............................................................................................................22乘、除、模乘運(yùn)算最終都能歸結(jié)為加法運(yùn)算。在不同的場(chǎng)合使用的加法器對(duì)其要求也不同，有的要求速度快，有的要求面積小。常見(jiàn)的加的器件設(shè)計(jì)一個(gè)加法器。關(guān)鍵字：串行進(jìn)位加法器74LS283超前進(jìn)位加法器74185二-十進(jìn)制BCD代碼轉(zhuǎn)換器數(shù)碼管顯示1.八位二進(jìn)制加數(shù)與被加數(shù)的輸入2.三位數(shù)碼管顯示3.三位十進(jìn)制加數(shù)與被加數(shù)的輸入第一章系統(tǒng)概述1、總體設(shè)計(jì)思想32、總體設(shè)計(jì)方案論證及選擇:八位二進(jìn)制數(shù)到三位十進(jìn)制碼轉(zhuǎn)換4:九位二進(jìn)制數(shù)到三位三位十進(jìn)制碼十進(jìn)制碼的轉(zhuǎn)換加法運(yùn)算數(shù)碼管顯示輸出:5三位十進(jìn)制碼九位二進(jìn)制數(shù)到三位十進(jìn)制碼的轉(zhuǎn)換三位數(shù)碼管顯示輸出四位數(shù)碼管顯示輸出數(shù)AAAA和BBBB1321032106111174283A0SSSS01230123IBBBCCO7AABB0033SSCI03COCiC)0ii0iiI84443、系統(tǒng)框圖）制）94、工作原理41499第二章單元電路設(shè)計(jì)與分析1.、三位十進(jìn)制數(shù)的加法運(yùn)算模塊（梁輝）410D1=>8&&&&12345670941499時(shí)，則不需要修正或者說(shuō)加上個(gè)11U24A33U22A36&32&74ALS10AMU23A修正電路317400NU21A35&74S04N7400N34U203012101314A4SUM_41435A3SUM_3U19A2SUM_220A1SUM_112101314被加421BCD0143515B311B2B1A1SUM_17C0C4915B3B2B1加數(shù)8421BCD2674LS283N7C0C4974LS283N12857&進(jìn)位輸出&6&431輸出和數(shù)個(gè)位的碼542十進(jìn)制加數(shù)個(gè)位碼313215460279十進(jìn)制被加數(shù)個(gè)位碼6790進(jìn)位輸出&&&31輸出和數(shù)十位的碼54312十進(jìn)制加數(shù)十位碼0546279十進(jìn)制被加數(shù)十位碼6799&進(jìn)位輸出&&1輸出和數(shù)百位的碼4312十進(jìn)制加數(shù)百位碼0546279十進(jìn)制被加數(shù)百位碼679132.八位二進(jìn)制加法運(yùn)算模塊（李冰玉）9的14VCCAA762537625374LS83C0S441U1U31516第三章系統(tǒng)綜述、總體電路圖1、系統(tǒng)綜述：2、總電路圖：179846200