EDA技術(shù)及軟件外文翻譯

1、EDA Technology And SoftwareEDA is Electronic Design Automation (Electronic Automation) is the abbreviation of themselves, in the early 1990s from computer aided Design (CAD), computer aided manufacturing (CAM), computer aided testing (CAT) and computer aided engineering (CAE) development of the conc

2、epts and come.EDA technology is on the computer as the tool, the designer in EDA software platform, with VHDL HDL finish design documents, then by the computer automatically logic compilation, reduction, division, comprehensive, optimization, layout and wiring and simulation for a particular goal ch

3、ips, until the adapter compilation, logic mapping and programming download, etc.1 EDA technology conceptsEDA technology is in electronic CAD technology developed on the basis of computer software system by means of computer for working platform, shirt-sleeve application of electronic technology, com

4、puter technology and information processing and intelligent technology to the latest achievements of electronic products, the automatic design.Using EDA tools, electronic stylist can be from concept, algorithm, agreement, etc, begin to design your electronic system a lot work can be finished by comp

5、uter and electronic products can be from circuit design, performance analysis to design the IC territory or PCB layout the whole process of the computer automatically complete the processing.Now on the concept of using EDA or category very wide. Included in machinery, electronics, communication, aer

6、ospace, chemical, mineral, biology, medicine, military and other fields, have EDA applications. Current EDA technology has in big companies, enterprises, institutions and teaching research departments extensive use. For example in the aircraft manufacturing process, from design, performance testing

7、and characteristic analysis until a flight simulator, all may involve EDA technology. Globalization-the EDA technology, mainly in electronic circuit design, PCB design and IC design.EDA can be divided into system level and circuit-level and physical implementation level.2. Development Environment MA

8、X + PLUS II / QUARTER IIAltera Corporation is the world's three major CPLD / FPGA manufacturers of the devices it can achieve the highest performance and integration, not only because of the use of advanced technology and new logic structure, but also because it provides a modern design tools MA

9、X + PLUSIprogrammable logic development software, the software is launched the third generation of Altera PLD development system. Nothing to do with the structure provides a design environment for Altera CPLD designers to easily design entry, quick processing, and device programming. MAX + PLUS Ipro

10、vides a comprehensive logic design capabilities, including circuit diagrams, text and waveform design entry and compilation, logic synthesis, simulation and timing analysis, and device programming, and many other features. Especially in the schematic so, MAX + PLUS n is considered the most easy to u

11、se, the most friendly man-machine interface PLD development software. MAX + PLUSncan develop anything other than the addition APEX20K CPLD / FPGA.MAX + PLUS n development system has many outstanding features: open interface. design and construction related: MAX + PLUSn support Altera's Classic,

12、ACEX 1K, MAX 3000, MAX 5000, MAX 7000, MAX 9000, FLEX 6000, FLEX 8000 and FLEX 10K series of programmable logic devices, gate count is 600 250 000 doors, offers the industry really has nothing to do with the structure of programmable logic design environment. MAX + PLUSncompiler also provides a powe

13、rful logic synthesis and optimization to reduce the burden on the user's design. can be run on multiple platforms: MAX + PLUSn software PC-based WindowsNT 4.0, Windows 98, Win dows 2000 operating systems, but also in Sun SPARCstations, HP 9000 Series 700/800, IBM RISC System/6000 such as run on

14、workstations. fully integrated: MAX + PLUSn software design input, processing, calibration functions are fully integrated within the programmable logic development tools, which can be debugged more quickly and shorten the development cycle. modular tools: designers can input from a variety of design

15、, editing, calibration and programming tools to choose the device to form a user-style development environment, when necessary,to retain on the basis of the original features to add new features. The MAX + PLUSn Series supports a variety of devices, designers need to learn new development tools for

16、the development of new device structures. mail-description language (HDL): MAX + PLUSn software supports a variety of HDL design entry, including the standard VHDL, Verilog HDL and Altera's own developed hardware description language AHDL. MegaCore Function: MegaCore are pre-validated for the re

17、alization of complex system-level functions provided by the HDL netlist file. It ACEX 1K, MAX 7000, MAX 9000, FLEX 6000, FLEX 8000 and FLEX 10K devices provide the most optimal design. Users can purchase them from the Altera MegaCore, using them can reduce the design task, designers can make more ti

18、me and energy to improve the design and final product up. OpenCore Features: MAX + PLUSn software with open characteristics of the kernel, OpenCore come to buy products for designers design their own assessment.At the same time, MAX + PLUS n there are many other design entry methods, including: grap

19、hic design input: MAX + PLUSn graphic design input than other software easier to use features, because the MAX + PLUS n provides a rich library unit for the designer calls, especially in the MAX2LIB in the provision of the mf library includes almost all 74 series of devices, in the prim library prov

20、ides all of the separatedigital circuit devices. So long as a digital circuit knowledge, almost no learning can take advantage of excess MAX + PLUSn for CPLD / FPGA design. MAX + PLUS nalso includes a variety of special logic macros (Macro-Function) and the parameters of the trillion of new features

21、 (Mega-Function) module. Full use of these modules are designed to greatly reduce the workload of designers to shorten design cycles and multiply. En ter the text editor: MAX + PLUS n text in put Ian guage and compiler system supports AHDL, VHDL language, VERILOG language of the three input methods.

22、 wave input: If you know the input, output waveform, the waveform input can also be used. hybrid approach: MAX + PLUS n design and development environment forgraphical design entry, text editing input, waveform editing input hybrid editing. To do: in graphics editing, wave form editing module by edi

23、ting the text include "module name. Inc" or the use of Function (. .) Return () Way call. Similarly, the textediting module input form can also be called when the graphics editor, AHDL compiler results can be used in the VHDL language, VHDL compiler of the results can also be entered in th

24、e AHDL language or graphic to use. This flexible input methods, to design the user has brought great convenience.Altera's Quartusn is a comprehensive PLD development software to support the schematic, VHDL, Verilog HDL, and AHDL (Altera Hardware Description Language) and other design input forms

25、, embedded devices, and integrated its own simulator, you can complete the design input to complete the hardware configuration of the PLD design process.Quartusn in the XP, Linux and Unix on the use, in addition to using the Tcl script to complete the design process, to provide a complete graphical

26、user interface design. With running speed, unified interface, feature set, easy to use and so on.Altera's Quartusn support IP core, including the LPM / MegaFunction macro function module library, allowing users to take full advantage of sophisticated modules, simplifying the design complexity an

27、d speed up the design speed. Good for third-party EDA tool support also allows the user to the various stages in the design process using the familiar third-party EDA tools.In addition, Quartusn and DSP Builder tools and by Matlab / Simulink combination, you can easily achieve a variety of DSP appli

28、cations; support Altera's programmable system chip (SOPC) development, set system-level design, embedded software development, programmable logic design in one, is a comprehensive development platform.MaxPLUSn generation as Altera's PLD design software, due to its excellent ease of use has b

29、een widely used. Altera has now stopped MaxPLUSnupdate support, Quartusn not only support the device type as compared to the rich and the graphical interface changes. Altera Quartusn included in many such SignalTapn , Chip Editor and RTL Viewer design aids, integrated SOPC and HardCopy design proces

30、s, and inherit MaxPLUSnfriendly graphical interface and easy to use.MaxPLUSn generation as Altera's PLD design software, due to its excellent ease of use has been widely used. Altera has now stopped MaxPLUSnupdate support, Quartusn not only support the device type as compared to the rich and the

31、 graphical interface changes. Altera Quartusn included in many such SignalTapn , Chip Editor and RTL Viewer design aids, integrated SOPC and HardCopy design process, and inherit MaxPLUSn friendly graphical interface and easy to use.Altera QuartusH as a programmable logic desig n en vir onment, due t

32、o its stro ng design capabilities and intuitive interface, more and more digital systems designers welcome.Altera's QuartusH is the fourth generation of programmable logic PLD software development platform. The platform supports a working group under the design requirements, including support fo

33、r Internet-based collaborative design. Quartus platform and Cadence, ExemplarLogic, MentorGraphics, Synopsys and Synplicity EDA vendors and other development tools are compatible. LogicLock improve the software module design features, added FastFit compiler options, and promote the network editing p

34、erformance, and improved debugging capabilities. MAX7000/MAX3000 devices and other items to support the product.3. Development of language VHDLVHDL (Very High Speed Integrated Circuit Hardware Description Language) is a very high speed integrated circuit hardware description language, it can describ

35、e the function of the hardware circuitry, signal connectivity and the time between languages. It can be more effective than the circuit diagram to express the characteristics of the hardware circuit. Using the VHDL language, you can proceed to the general requirements of the system, since the detail

36、ed content will be designed to come down to earth, and finally to complete the overall design of the system hardware. IEEE VHDL language has been the industry standard as a design to facilitate reuse and sharing the results. At present, it can not be applied analog circuit design, but has been put i

37、nto research. VHDL program structure, including: entity (Entity), structure (Architecture), configure (Configuration), Package Collection (Package) and the Library (Library). Among them, the entity is the basic unit of a VHDL program, by entity and the structure of two parts: the physical design sys

38、tem that is used to describe the external interface signal; structure used to describe the behavior of the system, the system processes or system data structure form. Configuration select the required language from the library system design unit to form different versions of different specifications

39、, so that the function is designed to change the system. Collection of records of the design module package to share the data types, constants, subroutines and so on. Database used to store the compiled entities, the body structure, including the collection and configuration: one is the development

40、of engineering software user, the other is the manufacturer's database.VHDL, the main features are: powerful, high flexibility: VHDL language is a powerful language structure, clear and concise code can be used to design complex control logic. VHDL language also supports hierarchical design, sup

41、port design databases and build reusable components. Currently, VHDL language has become a design, simulation, synthesis of standard hardware description language. Device independence: VHDL language allows designers to generate a design do not need to first select a specific device. For the same des

42、ign description, you can use a variety of different device structures to achieve its function. So the design description stage, able to focus on design ideas. When the design, simulation, after the adoption of a specific device specified integrated, adapter can be. Portability: VHDL language is a st

43、andard language, so the use of VHDL design can be carried out by different EDA tool support. Transplanted from one toanother simulation tools simulation tools, synthesis tools from a port to another integrated tool, from a working platform into another working platform. EDA tools used in a technical

44、 skills, in other tools can also be used. top-down design methods: the traditional design approach is bottom-up design or flat design. Bottom-up design methodology is to start the bottom of the module design, the gradual formation of the functional modules of complex circuits. Advantage of this desi

45、gn is obvious becauseit is a hierarchical circuit design, the general circuit sub-module are in accordance with the structure or function of division, so the circuit level clear, clear structure, easy people to develop, while the design archive file is easy, easy communication. Bottom-up design is a

46、lso very obvious shortcomings, the overall design concept is often not leaving because the cost of months of low-level design in vain. Flat design is a module containing only the circuit, the circuit design is straightforward and, with no division structure and function, it is not hierarchical circu

47、it design. Advantages of small circuit design can save time and effort, but with the increasing complexity of the circuit, this design highlights the shortcomings of the abnormal changes. Top-down design approach is to design top-level circuit description (top model), and then the top-level simulati

48、on using EDA software, if the top-level design of the simulation results meet the requirements, you can continue to lower the top-level module by the division level and simulation, design of such a level will eventually complete the entire circuit. Top-down design method compared with the first two

49、are obvious advantages. rich data types: as a hardware description language VHDL data types are very rich language, in addition to VHDL language itself dozens of predefined data types, in the VHDL language programming also can be user-defined data types. Std_logic data types in particular the use of

50、 VHDL language can make the most realistic complex signals in analog circuits. modeling convenience: the VHDL language can be integrated in the statement and the statement are available for simulation, behavior description ability, therefore particularly suitable for signal modeling language VHDL. T

51、he current VHDL syn thesizer to complex arithmetic comprehe nsive descripti ons (such as: Quartus n 2.0 and above versions of std_logic_vector type of data can add, subtract, multiply, divide), so the circuit modeling for complex simulation of VHDL language, whether or comprehensive description of t

52、he language are very appropriate. rich runtime and packages: The current package supports VHDL, very rich, mostly in the form of libraries stored in a specific directory, the user can at any time.Such as the IEEE librarycollectionstd_logic_1164,std_logic_arith,std_logic_unsigned other package. In th

53、e CPLD / FPGA synthesis, EDA software vendors can also use the various libraries and provide package. VHDL language and the user using a variety of results can be stored in a library, in the design of the follow-up can continue to use. VHDL language is a modeling hardware description language, so wi

54、th ordinary computer languagesare very different, common computer language is the CPU clock according to the beat, after an instruction to perform the next instruction, so instruction is a sequential, that is the order of execution, and execution of each instruction takes a specific time. VHDL langu

55、age to describe the results with the corresponding hardware circuit, which follows the characteristics of hardware, there is no order of execution of the statement is executed concurrently; and statements that do not like ordinary software, take some time each instruction, just follow their own hard

56、ware delay.EDA技術(shù)及軟件EDA是電子設(shè)計自動化(Electronic Design Automation)的縮寫,在20世紀90年代初從計算機輔助設(shè)計(CAD)、計算機輔助制造(CAM)計算機輔助測試(CAT) 和計算機輔助工程(CAE)的概念發(fā)展而來。EDA技術(shù)就是以計算機為工具，設(shè)計者在 EDA軟件平臺上，用硬件描述語言 HDL完成設(shè)計文件，然后由計算機自動地完成邏輯編譯、化簡、分割、綜合、優(yōu) 化、布局、布線和仿真，直至對于特定目標芯片的適配編譯、邏輯映射和編程下 載等工作。1 EDA 技術(shù)的概念EDA技術(shù)是在電子CAD技術(shù)基礎(chǔ)上發(fā)展起來的計算機軟件系統(tǒng)，是指以計算 機為工作

57、平臺， 融合了應(yīng)用電子技術(shù)、 計算機技術(shù)、 信息處理及智能化技術(shù)的最 新成果，進行電子產(chǎn)品的自動設(shè)計。利用EDA工具，電子設(shè)計師可以從概念、算法、協(xié)議等開始設(shè)計電子系統(tǒng)， 大量工作可以通過計算機完成， 并可以將電子產(chǎn)品從電路設(shè)計、 性能分析到設(shè)計 出IC版圖或PCB版圖的整個過程的計算機上自動處理完成。現(xiàn)在對EDA的概念或范疇用得很寬。包括在機械、電子、通信、航空航天、 化工、礦產(chǎn)、生物、醫(yī)學、軍事等各個領(lǐng)域，都有 EDA的應(yīng)用。目前EDA技術(shù)已 在各大公司、 企事業(yè)單位和科研教學部門廣泛使用。 例如在飛機制造過程中， 從 設(shè)計、性能測試及特性分析直到飛行模擬，都可能涉及到EDA技術(shù)。本文所指

58、的 EDA技術(shù)，主要針對電子電路設(shè)計、PCB設(shè)計和IC設(shè)計。EDA設(shè)計可分為系統(tǒng)級、電路級和物理實現(xiàn)級。2 開發(fā)環(huán)境 MAX+PLUS/QUARTERAltera公司是世界三大CPLDT FPGA廠家之一，它的器件能達到最高的性能 和集成度， 不僅僅因為采用了先進的工藝和全新的邏輯結(jié)構(gòu)， 還在于它提供了現(xiàn) 代化的設(shè)計工具一 MAX+PLUS可編程邏輯開發(fā)軟件，該軟件是Altera公司推出 的第三代PLD開發(fā)系統(tǒng)。提供了一種與結(jié)構(gòu)無關(guān)的設(shè)計環(huán)境，使Altera CPLD設(shè) 計者能方便地進行設(shè)計輸入、快速處理和器件編程。MAX+PLUS提供了全面的邏 輯設(shè)計能力，包括電路圖、文本和波形的設(shè)計輸入以

59、及編譯、邏輯綜合、仿真和 定時分析以及器件編程等諸多功能。特別是在原理圖輸入等方面，MAX+PLUS被 公認為是最易使用、人機界面最友好的PLD開發(fā)軟件。MAX+PLUS可以開發(fā)除APEX20K以外的任何 CPLDXFPGAMAX+PLUS開發(fā)系統(tǒng)具有很多突出的特點： 開放式的界面。 設(shè)計與結(jié)構(gòu)無關(guān)：MAX+PLUS支持Altera 公司的Classic、ACEX1K、MAX 3000、MAX 5000 MAX 7000 MAX 9000 FLEX 6000 FLEX 8000和 FLEX 10K等 系列可編程邏輯器件，門數(shù)為 600250 000門，提供了業(yè)界真正與結(jié)構(gòu)無關(guān)的可編程邏輯設(shè)計環(huán)境。MAX+PLUS的編譯器還提供了強大的邏輯綜合與優(yōu)化功能 以減輕用戶的設(shè)計負擔。 可在多種平臺運行：MAX+PLUS軟件可在基于 PC機的 WindowsNT 4.0、 Windows98、Win dows2000 操作系統(tǒng)下運行， 也可在 Sun SPARCstations、HP