DRAM內(nèi)存Moving Inversion+改進(jìn)算法的研究

1、    DRAM內(nèi)存Moving Inversion+改進(jìn)算法的研究       隨著大容量存儲(chǔ)芯片在各種系統(tǒng)中的廣泛運(yùn)用。存儲(chǔ)芯片的穩(wěn)定影響著整個(gè)系統(tǒng)的穩(wěn)定性，因此，對(duì)存儲(chǔ)芯片的測(cè)試顯得越來越重要。    目前，從存儲(chǔ)芯片的測(cè)試成本考慮，高效的測(cè)試技術(shù)在存儲(chǔ)芯片的測(cè)試中被普遍使用。針對(duì)這一情況，本文對(duì)運(yùn)用最廣泛的DRAM內(nèi)存測(cè)試算法進(jìn)行了研究，通過實(shí)驗(yàn)并對(duì)不同的內(nèi)存測(cè)試算法作了介紹與比較，特別是對(duì)Moving Inversion算法進(jìn)行改進(jìn)，提出了具有更高的故障覆

2、蓋率，并且具有更好的故障診斷能力的測(cè)試算法一Moving Inversion+算法。通過實(shí)驗(yàn)，論證了新算法故障診斷能力得到提高。但由于算法的改進(jìn)，使測(cè)試時(shí)間略有所增加。    本論文組織如下:首先理論背景，介紹了DRAM內(nèi)存的測(cè)試技術(shù)及測(cè)試的發(fā)展與基本原理。列舉了各種主要的故障模型，然后根據(jù)傳統(tǒng)的Moving Inversion算法提出了改進(jìn)的Moving Inversion+算法及測(cè)試結(jié)構(gòu)。最后通過實(shí)驗(yàn)完成對(duì)新算法的評(píng)測(cè)，得出結(jié)論，并完成本文的總結(jié)。DRAM Memory Moving Inversion+ Algorithm AnalysisAbstract&

3、#160;   Along with the widespread utilization of large capacity memory chip in each kind of system, overall stability of system is affected by memory chip's stability, therefore,memory chip test becomes more and more important.    At present, highly effective test techno

4、logy is generally used in memory chip's test considering of memory chip's test cost. In view of this situation, this article conducted research to the most widespread DRAM memory test algorithm, made introduction and comparison of different memory test algorithm, analysis the improvement of

5、Moving Inversion algorithm, proposed the Moving Inversion+ algorithm with higher failure coverage rate and better failure diagnosis ability.  Through the experiment, the new algorithm's failure diagnosis ability has been sharpened at the expense of slightly increased testing time. 

6、0;  This paper organized as following: First, theory background, introduced the DRAM memory test technology, Enumerated main failure model; Then, proposed the improved algorithm一Moving Inversion+ algorithm and its test structure; Finally,  completed evaluation to this new algorithm by expe

7、rimenting. 目錄第一章緒論.11課題背景.11. 1. 1可測(cè)試性問題簡(jiǎn)介.11. 1. 2測(cè)試技術(shù)的發(fā)展動(dòng)態(tài).22課題的意義及主要工作. 31. 2. 1課題的意義. 31.2.2本文的主要工作. 3第二章DRAM內(nèi)存測(cè)性技術(shù)與算法. 52. 1測(cè)試技術(shù). 5  2.1.1測(cè)試的基本概念. 5  2. 1. 2測(cè)試技術(shù)的應(yīng)用. 62. 2存儲(chǔ)器測(cè)試技術(shù). 72. 3 DRAM內(nèi)存技術(shù)概述. 82. 4典型的DRAM存儲(chǔ)功能故障模型.102. 5常用的DRAM內(nèi)存測(cè)試算法.12第三章改進(jìn)型MOVING INVERSION內(nèi)存測(cè)試算法.153. 1  DRAM內(nèi)存MOVING INVERSION算法.153. 2改進(jìn)型MOVINGNVERSION+算法.173. 3 DRAM內(nèi)存MOVING INVERSION+算法編譯. 19第四章算法實(shí)現(xiàn)及實(shí)驗(yàn)結(jié)果.214. 1實(shí)驗(yàn)設(shè)備介紹.214. 2 DDR2 UD I MM內(nèi)存基本參數(shù).224. 3 MOV I +算法實(shí)現(xiàn).244. 4實(shí)驗(yàn)結(jié)果.274. 5結(jié)論.28參考文獻(xiàn).29攻讀學(xué)位期間公開發(fā)表的論文.30附錄.31致謝.434.5 結(jié)論