基于STM32鋼廠安全工作區(qū)域監(jiān)控管理系統(tǒng)設計

如圖5-3，開啟服務器后上位機將獲得各個傳感器器的參數(shù)，隨后將移動距離、距離物體的距離、接受聲音信號、溫濕度信息上下限設置完畢，當溫濕度過高或PM值過高，噪音過高時自動打開通風模塊，決定是否移動。圖5-4數(shù)據(jù)庫記錄數(shù)據(jù)連通數(shù)據(jù)庫創(chuàng)建上圖所示的表可以達到實時記錄數(shù)據(jù)，謹防數(shù)據(jù)丟失。第6章總結與展望6.1總結系統(tǒng)調(diào)試過程并不如意，碰到了許多錯誤難題，甚至一度陷入迷茫。而經(jīng)過老師指導與幫助，使我成功找出了問題，同時糾正了異常不合理之處，讓設計質(zhì)量獲得足夠保證。設計階段各種問題與處理方案如下：(1)功率模塊仿真階段，調(diào)試輸出值始終無法實現(xiàn)設計要求。通過查驗分析，發(fā)現(xiàn)電路板焊接時出現(xiàn)了一些技術問題，于是重新焊接。(2)運行仿真軟件，找出異常代碼。再進行優(yōu)化調(diào)整，確認在啟動程序后，MCU并未有效復位，因此加入復位程序，最終可以達到滿意效果。(3)實際仿真過程中，提示P0口出現(xiàn)邏輯錯誤。雖然不影響輸出，但在印刷制版階段將影響電源電路。經(jīng)調(diào)研可知，數(shù)據(jù)接口傳輸代碼期間，無法識別忙狀態(tài)。后續(xù)加入忙狀態(tài)識別后，系統(tǒng)運行無異常，數(shù)據(jù)接口并未出現(xiàn)錯誤提示。6.2展望設計以區(qū)域監(jiān)控管理系統(tǒng)制造連動為研究對象，在具體分析CO2、SO2、聲音信號和周圍環(huán)境影響后，設計一種基于MCU的自動控制系統(tǒng)，主要完成了以下任務。(1)按照有關資料與國家行業(yè)規(guī)范，明確外界環(huán)境對檢測設備影響，同時以此為前提，確立以聲音高低、聲音指令控制為宗旨安全工作區(qū)域監(jiān)控管理系統(tǒng)制造連動自動控制系統(tǒng)；(2)針對上述問題，制定了詳細設計方案，即以聲音傳感器采集數(shù)據(jù)，通過單片機開發(fā)控制全部體系。即便仿真分析結果顯示所有設計全部達到設計要求，但受時間、個人能力等因素掣肘，還有大量問題沒有得到妥善處理，導致系統(tǒng)本身仍有不足之處，需要進行更深入研究與探討，促使功能更加完善，以解決實踐應用需求。本系統(tǒng)功能相對較少，設計方面有所欠缺，后續(xù)研究階段應圍繞如下幾點進行優(yōu)化：(3)本系統(tǒng)缺少控制誤差切實有效算法，后續(xù)要增加優(yōu)化算法來控制，譬如PID、模糊、神經(jīng)網(wǎng)絡等算法。通過這些算法優(yōu)化控制，可大幅增強實用價值。(4)后續(xù)工作、學習階段，需要考慮工控屏開發(fā)設計。譬如引入計算機接口傳輸各節(jié)點語音數(shù)據(jù)，或開發(fā)一款無線數(shù)傳手機APP，不管身處何地均可以監(jiān)控實時狀況全方位的智能機器人，此設備維護簡單，能夠滿足用戶的基本需求，擁有較高的性價比，采用物美價廉的元器件，非常符合當今市場對該設計的需求的機器人，此設備維護簡單，能夠滿足用戶的需求，擁有較高的性價比，采用物美價廉的器件，符合當今市場對該設計的需求，能更好的推動產(chǎn)業(yè)，有廣闊的市場前景。由此看來，本文采用靜態(tài)數(shù)據(jù)法、動態(tài)性法進行研究,通過利用STM32為主控制單位,利用噪音傳感器、溫濕度傳感器、PM傳感器、SO2傳感器、CO2傳感器、蜂鳴器、通風模塊等其他設備來進行過程監(jiān)測實現(xiàn)了對鋼廠的煙氣、傳感器診斷使整個系統(tǒng)質(zhì)量平衡解決了我國鋼鐵企業(yè)以往的落后安全管理模式可提高我國鋼鐵企業(yè)生產(chǎn)運作的效率和水平,保障我國在鋼鐵企業(yè)工作的員工安全問題,充分利用全新的信息化手段可構建本文中的基于STM32鋼廠安全工作區(qū)域監(jiān)控管理系統(tǒng)設計。

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etthePriorityMaskvalue**@parampriMaskPriMask**Settheprioritymaskbitintheprioritymaskregister*/__ASMvoid__set_PRIMASK(uint32_tpriMask){msrprimask,r0bxlr}/***@briefReturntheFaultMaskvalue**@returnFaultMask**Returnthecontentofthefaultmaskregister*/__ASMuint32_t__get_FAULTMASK(void){mrsr0,faultmaskbxlr}/***@briefSettheFaultMaskvalue**@paramfaultMaskfaultMaskvalue**Setthefaultmaskregister*/__ASMvoid__set_FAULTMASK(uint32_tfaultMask){msrfaultmask,r0bxlr}/***@briefReturntheControlRegistervalue**@returnControlvalue**Returnthecontentofthecontrolregister*/__ASMuint32_t__get_CONTROL(void){mrsr0,controlbxlr}/***@briefSettheControlRegistervalue**@paramcontrolControlvalue**Setthecontrolregister*/__ASMvoid__set_CONTROL(uint32_tcontrol){msrcontrol,r0bxlr}#endif/*__ARMCC_VERSION*/#elif(defined(__ICCARM__))/*ICCCompiler*//*IARiccarmspecificfunctions*/#pragmadiag_suppress=Pe940/***@briefReturntheProcessStackPointer**@returnProcessStackPointer**Returntheactualprocessstackpointer*/uint32_t__get_PSP(void){__ASM("mrsr0,psp");__ASM("bxlr");}/***@briefSettheProcessStackPointer**@paramtopOfProcStackProcessStackPointer**AssignthevalueProcessStackPointertotheMSP*(processstackpointer)Cortexprocessorregister*/void__set_PSP(uint32_ttopOfProcStack){__ASM("msrpsp,r0");__ASM("bxlr");}/***@briefReturntheMainStackPointer**@returnMainStackPointer**ReturnthecurrentvalueoftheMSP(mainstackpointer)*Cortexprocessorregister*/uint32_t__get_MSP(void){__ASM("mrsr0,msp");__ASM("bxlr");}/***@briefSettheMainStackPointer**@paramtopOfMainStackMainStackPointer**AssignthevaluemainStackPointertotheMSP*(mainstackpointer)Cortexprocessorregister*/void__set_MSP(uint32_ttopOfMainStack){__ASM("msrmsp,r0");__ASM("bxlr");}/***@briefReversebyteorderinunsignedshortvalue**@paramvaluevaluetoreverse*@returnreversedvalue**Reversebyteorderinunsignedshortvalue*/uint32_t__REV16(uint16_tvalue){__ASM("rev16r0,r0");__ASM("bxlr");}/***@briefReversebitorderofvalue**@paramvaluevaluetoreverse*@returnreversedvalue**Reversebitorderofvalue*/uint32_t__RBIT(uint32_tvalue){__ASM("rbitr0,r0");__ASM("bxlr");}/***@briefLDRExclusive(8bit)**@param*addraddresspointer*@returnvalueof(*address)**ExclusiveLDRcommandfor8bitvalues)*/uint8_t__LDREXB(uint8_t*addr){__ASM("ldrexbr0,[r0]");__ASM("bxlr");}/***@briefLDRExclusive(16bit)**@param*addraddresspointer*@returnvalueof(*address)**ExclusiveLDRcommandfor16bitvalues*/uint16_t__LDREXH(uint16_t*addr){__ASM("ldrexhr0,[r0]");__ASM("bxlr");}/***@briefLDRExclusive(32bit)**@param*addraddresspointer*@returnvalueof(*address)**ExclusiveLDRcommandfor32bitvalues*/uint32_t__LDREXW(uint32_t*addr){__ASM("ldrexr0,[r0]");__ASM("bxlr");}/***@briefSTRExclusive(8bit)**@paramvaluevaluetostore*@param*addraddresspointer*@returnsuccessful/failed**ExclusiveSTRcommandfor8bitvalues*/uint32_t__STREXB(uint8_tvalue,uint8_t*addr){__ASM("strexbr0,r0,[r1]");__ASM("bxlr");}/***@briefSTRExclusive(16bit)**@paramvaluevaluetostore*@param*addraddresspointer*@returnsuccessful/failed**ExclusiveSTRcommandfor16bitvalues*/uint32_t__STREXH(uint16_tvalue,uint16_t*addr){__ASM("strexhr0,r0,[r1]");__ASM("bxlr");}/***@briefSTRExclusive(32bit)**@paramvaluevaluetostore*@param*addraddresspointer*@returnsuccessful/failed**ExclusiveSTRcommandfor32bitvalues*/uint32_t__STREXW(uint32_tvalue,uint32_t*addr){__ASM("strexr0,r0,[r1]");__ASM("bxlr");}#pragmadiag_default=Pe940#elif(defined(__GNUC__))/*GNUCompiler*//*GNUgccspecificfunctions*//***@briefReturntheProcessStackPointer**@returnProcessStackPointer**Returntheactualprocessstackpointer*/uint32_t__get_PSP(void)__attribute__((naked));uint32_t__get_PSP(void){uint32_tresult=0;__ASMvolatile("MRS%0,psp\n\t""MOVr0,%0\n\t""BXlr\n\t":"=r"(result));return(result);}/***@briefSettheProcessStackPointer**@paramtopOfProcStackProcessStackPointer**AssignthevalueProcessStackPointertotheMSP*(processstackpointer)Cortexprocessorregister*/void__set_PSP(uint32_ttopOfProcStack)__attribute__((naked));void__set_PSP(uint32_ttopOfProcStack){__ASMvolatile("MSRpsp,%0\n\t""BXlr\n\t"::"r"(topOfProcStack));}/***@briefReturntheMainStackPointer**@returnMainStackPointer**ReturnthecurrentvalueoftheMSP(mainstackpointer)*Cortexprocessorregister*/uint32_t__get_MSP(void)__attribute__((naked));uint32_t__get_MSP(void){uint32_tresult=0;__ASMvolatile("MRS%0,msp\n\t""MOVr0,%0\n\t""BXlr\n\t":"=r"(result));return(result);}/***@briefSettheMainStackPointer**@paramtopOfMainStackMainStackPointer**AssignthevaluemainStackPointertotheMSP*(mainstackpointer)Cortexprocessorregister*/void__set_MSP(uint32_ttopOfMainStack)__attribute__((naked));void__set_MSP(uint32_ttopOfMainStack){__ASMvolatile("MSRmsp,%0\n\t""BXlr\n\t"::"r"(topOfMainStack));}/***@briefReturntheBasePriorityvalue**@returnBasePriority**Returnthecontentofthebasepriorityregister*/uint32_t__get_BASEPRI(void){uint32_tresult=0;__ASMvolatile("MRS%0,basepri_max":"=r"(result));return(result);}/***@briefSettheBasePriorityvalue**@parambasePriBasePriority**Setthebasepriorityregister*/void__set_BASEPRI(uint32_tvalue){__ASMvolatile("MSRbasepri,%0"::"r"(value));}/***@briefReturnthePriorityMaskvalue**@returnPriMask**Returnstateoftheprioritymaskbitfromtheprioritymaskregister*/uint32_t__get_PRIMASK(void){uint32_tresult=0;__ASMvolatile("MRS%0,primask":"=r"(result));return(result);}/***@briefSetthePriorityMaskvalue**@parampriMaskPriMask**Settheprioritymaskbitintheprioritymaskregister*/void__set_PRIMASK(uint32_tpriMask){__ASMvolatile("MSRprimask,%0"::"r"(priMask));}/***@briefReturntheFaultMaskvalue**@returnFaultMask**Returnthecontentofthefaultmaskregister*/uint32_t__get_FAULTMASK(void){uint32_tresult=0;__ASMvolatile("MRS%0,faultmask":"=r"(result));return(result);}/***@briefSettheFaultMaskvalue**@paramfaultMaskfaultMaskvalue**Setthefaultmaskregister*/void__set_FAULTMASK(uint32_tfaultMask){__ASMvolatile("MSRfaultmask,%0"::"r"(faultMask));}/***@briefReturntheControlRegistervalue**@returnControlvalue**Returnthecontentofthecontrolregister*/uint32_t__get_CONTROL(void){uint32_tresult=0;__ASMvolatile("MRS%0,control":"=r"(result));return(result);}/***@briefSettheControlRegistervalue**@paramcontrolControlvalue**Setthecontrolregister*/void__set_CONTROL(uint32_tcontrol){__ASMvolatile("MSRcontrol,%0"::"r"(control));}/***@briefReversebyteorderinintegervalue**@paramvaluevaluetoreverse*@returnreversedvalue**Reversebyteorderinintegervalue*/uint32_t__REV(uint32_tvalue){uint32_tresult=0;__ASMvolatile("rev%0,%1":"=r"(result):"r"(value));return(result);}/***@briefReversebyteorderinunsignedshortvalue**@paramvaluevaluetoreverse*@returnreversedvalue**Reversebyteorderinunsignedshortvalue*/uint32_t__REV16(uint16_tvalue){uint32_tresult=0;__ASMvolatile("rev16%0,%1":"=r"(result):"r"(value));return(result);}/***@briefReversebyteorderinsignedshortvaluewithsignextensiontointeger**@paramvaluevaluetoreverse*@returnreversedvalue**Reversebyteorderinsignedshortvaluewithsignextensiontointeger*/int32_t__REVSH(int16_tvalue){uint32_tresult=0;__ASMvolatile("revsh%0,%1":"=r"(result):"r"(value));return(result);}/***@briefReversebitorderofvalue**@paramvaluevaluetoreverse*@returnreversedvalue**Reversebitorderofvalue*/uint32_t__RBIT(uint32_tvalue){uint32_tresult=0;__ASMvolatile("rbit%0,%1":"=r"(result):"r"(value));return(result);}/***@briefLDRExclusive(8bit)**@param*addraddresspointer*@returnvalueof(*address)**ExclusiveLDRcommandfor8bitvalue*/uint8_t__LDREXB(uint8_t*addr){uint8_tresult=0;__ASMvolatile("ldrexb%0,[%1]":"=r"(result):"r"(addr));return(result);}/***@briefLDRExclusive(16bit)**@param*addraddresspointer*@returnvalueof(*address)**ExclusiveLDRcommandfor16bitvalues*/uint16_t__LDREXH(uint16_t*addr){uint16_tresult=0;__ASMvolatile("ldrexh%0,[%1]":"=r"(result):"r"(addr));return(result);}/***@briefLDRExclusive(32bit)**@param*addraddresspointer*@returnvalueof(*address)**ExclusiveLDRcommandfor32bitvalues*/uint32_t__LDREXW(uint32_t*addr){uint32_tresult=0;__ASMvolatile("ldrex%0,[%1]":"=r"(result):"r"(addr));return(result);}/***@briefSTRExclusive(8bit)**@paramvaluevaluetostore*@param*addraddresspointer*@returnsuccessful/failed**ExclusiveSTRcommandfor8bitvalues*/uint32_t__STREXB(uint8_tvalue,uint8_t*addr){uint32_tresult=0;__ASMvolatile("strexb%0,%2,[%1]":"=r"(result):"r"(addr),"r"(value));return(result);}/***@briefSTRExclusive(16bit)**@paramvaluevaluetostore*@param*addraddresspointer*@returnsuccessful/failed**ExclusiveSTRcommandfor16bitvalues*/uint32_t__STREXH(uint16_tvalue,uint16_t*addr){uint32_tresult=0;__ASMvolatile("strexh%0,%2,[%1]":"=r"(result):"r"(addr),"r"(value));return(result);}/***@briefSTRExclusive(32bit)**@paramvaluevaluetostore*@param*addraddresspointer*@returnsuccessful/failed**ExclusiveSTRcommandfor32bitvalues*/uint32_t__STREXW(uint32_tvalue,uint32_t*addr){uint32_tresult=0;__ASMvolatile("strex%0,%2,[%1]":"=r"(result):"r"(addr),"r"(value));return(result);}#elif(defined(__TASKING__))/*TASKINGCompiler*//*TASKINGcarmspecificfunctions*//**TheCMSISfunctionshavebeenimplementedasintrinsicsinthecompiler.*Pleaseuse"carm-?i"togetanuptodatelistofallinstrinsics,*IncludingtheCMSISones.*/#endif/**************************************************************************//***@filecore_cm3.h*@briefCMSISCortex-M3CorePeripheralAccessLayerHeaderFile*@versionV1.30*@date30.October2009**@note*Copyright(C)2009ARMLimited.Allrightsreserved.**@par*ARMLimited(ARM)issupplyingthissoftwareforusewithCortex-M*processorbasedmicrocontrollers.Thisfilecanbefreelydistributed*withindevelopmenttoolsthataresupportingsuchARMbasedprocessors.**@par*THISSOFTWAREISPROVIDED"ASIS".NOWARRANTIES,WHETHEREXPRESS,IMPLIED*ORSTATUTORY,INCLUDING,BUTNOTLIMITEDTO,IMPLIEDWARRANTIESOF*MERCHANTABILITYANDFITNESSFORAPARTICULARPURPOSEAPPLYTOTHISSOFTWARE.*ARMSHALLNOT,INANYCIRCUMSTANCES,BELIABLEFORSPECIAL,INCIDENTAL,OR*CONSEQUENTIALDAMAGES,FORANYREASONWHATSOEVER.*******************************************************************************/#ifndef__CM3_CORE_H__#define__CM3_CORE_H__/**@addtogroupCMSIS_CM3_core_LintCinfigurationCMSISCM3CoreLintConfiguration**ListofLintmessageswhichwillbesuppressedandnotshown:*-Error10:\n*registeruint32_t__regBasePri__asm("basepri");\n*Error10:Expecting';'*.*-Error530:\n*return(__regBasePri);\n*Warning530:Symbol'__regBasePri'(line264)notinitialized*.*-Error550:\n*__regBasePri=(basePri&0x1ff);\n*Warning550:Symbol'__regBasePri'(line271)notaccessed*.*-Error754:\n*uint32_tRESERVED0[24];\n*Info754:localstructuremember'<some,notusedintheHAL>'(line109,file./cm3_core.h)notreferenced*.*-Error750:\n*#define__CM3_CORE_H__\n*Info750:localmacro'__CM3_CORE_H__'(line43,file./cm3_core.h)notreferenced*.*-Error528:\n*static__INLINEvoidNVIC_DisableIRQ(uint32_tIRQn)\n*Warning528:Symbol'NVIC_DisableIRQ(unsignedint)'(line419,file./cm3_core.h)notreferenced*.*-Error751:\n*}InterruptType_Type;\n*Info751:localtypedef'InterruptType_Type'(line170,file./cm3_core.h)notreferenced*.*Note:Tore-enableaMessage,insertaspacebefore'lint'***//*lint-save*//*lint-e10*//*lint-e530*//*lint-e550*//*lint-e754*//*lint-e750*//*lint-e528*//*lint-e751*//**@addtogroupCMSIS_CM3_core_definitionsCM3CoreDefinitionsThisfiledefinesallstructuresandsymbolsforCMSIScore:-CMSISversionnumber-Cortex-Mcoreregistersandbitfields-Cortex-Mcoreperipheralbaseaddress@{*/#ifdef__cplusplusextern"C"{#endif#define__CM3_CMSIS_VERSION_MAIN(0x01)/*!<[31:16]CMSISHALmainversion*/#define__CM3_CMSIS_VERSION_SUB(0x30)/*!<[15:0]CMSISHALsubversion*/#define__CM3_CMSIS_VERSION((__CM3_CMSIS_VERSION_MAIN<<16)|__CM3_CMSIS_VERSION_SUB)/*!<CMSISHALversionnumber*/#define__CORTEX_M(0x03)/*!<Cortexcore*/#include<stdint.h>/*Includestandardtypes*/#ifdefined(__ICCARM__)#include<intrinsics.h>/*IARIntrinsics*/#endif#ifndef__NVIC_PRIO_BITS#define__NVIC_PRIO_BITS4/*!<standarddefinitionforNVICPriorityBits*/#endif/***IOdefinitions**defineaccessrestrictionstoperipheralregisters*/#ifdef__cplusplus#define__Ivolatile/*!<defines'readonly'permissions*/#else#define__Ivolatileconst/*!<defines'readonly'permissions*/#endif#define__Ovolatile/*!<defines'writeonly'permissions*/#define__IOvolatile/*!<defines'read/write'permissions*//********************************************************************************RegisterAbstraction******************************************************************************//**@addtogroupCMSIS_CM3_core_registerCMSISCM3CoreRegister@{*//**@addtogroupCMSIS_CM3_NVICCMSISCM3NVICmemorymappedstructureforNestedVectoredInterruptController(NVIC)@{*/typedefstruct{__IOuint32_tISER[8];/*!<Offset:0x000InterruptSetEnableRegister*/uint32_tRESERVED0[24];__IOuint32_tICER[8];/*!<Offset:0x080InterruptClearEnableRegister*/uint32_tRSERVED1[24];__IOuint32_tISPR[8];/*!<Offset:0x100InterruptSetPendingRegister*/uint32_tRESERVED2[24];__IOuint32_tICPR[8];/*!<Offset:0x180InterruptClearPendingRegister*/uint32_tRESERVED3[24];__IOuint32_tIABR[8];/*!<Offset:0x200InterruptActivebitRegister*/uint32_tRESERVED4[56];__IOuint8_tIP[240];/*!<Offset:0x300InterruptPriorityRegister(8Bitwide)*/uint32_tRESERVED5[644];__Ouint32_tSTIR;/*!<Offset:0xE00SoftwareTriggerInterruptRegister*/}NVIC_Type;/*@}*//*endofgroupCMSIS_CM3_NVIC*//**@addtogroupCMSIS_CM3_SCBCMSISCM3SCBmemorymappedstructureforSystemControlBlock(SCB)@{*/typedefstruct{__Iuint32_tCPUID;/*!<Offset:0x00CPUIDBaseRegister*/__IOuint32_tICSR;/*!<Offset:0x04InterruptControlStateRegister*/__IOuint32_tVTOR;/*!<Offset:0x08VectorTableOffsetRegister*/__IOuint32_tAIRCR;/*!<Offset:0x0CApplicationInterrupt/ResetControlRegister*/__IOuint32_tSCR;/*!<Offset:0x10SystemControlRegister*/__IOuint32_tCCR;/*!<Offset:0x14ConfigurationControlRegister*/__IOuint8_tSHP[12];/*!<Offset:0x18SystemHandlersPriorityRegisters(4-7,8-11,12-15)*/__IOuint32_tSHCSR;/*!<Offset:0x24SystemHandlerControlandStateRegister*/__IOuint32_tCFSR;/*!<Offset:0x28ConfigurableFaultStatusRegister*/__IOuint32_tHFSR;/*!<Offset:0x2CHardFaultStatusRegister*/__IOuint32_tDFSR;/*!<Offset:0x30DebugFaultStatusRegister*/__IOuint32_tMMFAR;/*!<Offset:0x34MemManageAddressRegister*/__IOuint32_tBFAR;/*!<Offset:0x38BusFaultAddressRegister*/__IOuint32_tAFSR;/*!<Offset:0x3CAuxiliaryFaultStatusRegister*/__Iuint32_tPFR[2];/*!<Offset:0x40ProcessorFeatureRegister*/__Iuint32_tDFR;/*!<Offset:0x48DebugFeatureRegister*/__Iuint32_tADR;/*!<Offset:0x4CAuxiliaryFeatureRegister*/__Iuint32_tMMFR[4];/*!<Offset:0x50MemoryModelFeatureRegister*/__Iuint32_tISAR[5];/*!<Offset:0x60ISAFeatureRegister*/}SCB_Type;/*SCBCPUIDRegisterDefinitions*/#defineSCB_CPUID_IMPLEMENTER_Pos24/*!<SCBCPUID:IMPLEMENTERPosition*/#defineSCB_CPUID_IMPLEMENTER_Msk(0xFFul<<SCB_CPUID_IMPLEMENTER_Pos)/*!<SCBCPUID:IMPLEMENTERMask*/#defineSCB_CPUID_VARIANT_Pos20/*!<SCBCPUID:VARIANTPosition*/#defineSCB_CPUID_VARIANT_Msk(0xFul<<SCB_CPUID_VARIANT_Pos)