數(shù)字時鐘外文翻譯

1、 外文資料翻譯l ed using digital tube digital display its high-brightness, indicating the advantages of intuitive intelligence is widely used in areas such as equipment and household appliances. at89c52this article describes a single-chip microcomputer as the core, to a total of anode high-brightness led l

2、 ed as a display composed of seven figures show that the practical design of multi-function electronic clocks, the clock shows a week, hour, minute, second, it can be switched to year, month, day showed that the whole point of music at the same time and from time to time the alarm time and other fun

3、ctions can also be used for electronic stopwatch.clock circuit is the heart of the computer, which controls the rhythm of the work of the computer is through the completion of complex sequential circuits function in different directions.clock, since it was invented that day on, peoples lives has bec

4、ome an indispensable tool, especially in this era of efficient, the clock is in the human production and living, learning and other fields is widely. however, with the passage of time, people not only to the requirements of the clock is getting higher and higher precision, and functional requirement

5、s for the clock more and more, the clock has not only a tool used to display time, in many practical applications it also needs to be able to achieve more other functions. features such as alarm clock, calendar display, temperature measurement function, humidity measurements, voltage measurements, f

6、requency measurements, have been under-voltage alarm function. digital clocks to the peoples production and life has brought great convenience, but also greatly expands the time feature the original clocks. such as regular auto-alarm, automatic time-ling, time process automation, from time to time b

7、roadcast, from closed-circuit automatic lights, oven timer switch, on-off power equipment, electrical and even a variety of timing is automatically enabled, all of which are based on digital clocks and watches based. it can be said that the design of the significance of multi-function digital clock

8、digital clock is not just itself, a greater significance of the multi-function digital clock in a number of real-time control systems. in many practical applications, as long as the digital clock circuit of the programs and hardware to a certain degree of modification could be useful for real-time c

9、ontrol system, which applied to the actual work and production to. thus, digital clock and to expand its applications, has a very practical significance. with the development of human civilization, science and technology, there is the request of the clock continues to improve. clock has not only see

10、n as a tool to display the time, in many practical applications also need to be able to achieve more other functions. high-precision, multifunction, small size, low power consumption, is the development trend of the modern clock. in this trend, digital clock, multifunction clock has become the moder

11、n design of the production of research-led direction. this article is based on this design direction for the control of a single-chip core design requirements of a multi-function indicators in line with the digital clock. the design is based on the principle of single-chip technology to chip at89c52

12、single-chip microcomputer as the core controller, through the production of hardware and software procedures for the preparation, design to produce a multi-functional digital clock system. the clock system mainly by clock module, alarm module, the ambient temperature detection module, liquid crystal

13、 display module, control module and the keyboard signal prompted module. system is simple and clear user interface that can 4v 7v dc power under normal operation. able to accurately display time (display format hh: mm: seconds seconds, 24-hour system), may be time to adjust at any time, with clock t

14、ime settings, alarm on / off, only to make functions, where the clock to measure the ambient temperature and displayed. hardware and software design into the guiding ideology, give full play to the single-chip features, most of the functions through software programming to achieve, the circuit is si

15、mple and clear, high system stability. at the same time, the clock system also has the power of small, low cost, and highly practical. system components as a result of less use, single-chip occupied by the i / o port not more than, the system has a certain degree of scalability.clock design is no th

16、eory of discrete logic, programmable logic, or using full-custom silicon devices of any digital design, in order to successfully operate and reliable clock is crucial. poor design of the clock in the limits of temperature, voltage deviation or the manufacturing process will result in the case wrong,

17、 and debugging difficult, spending a lot. in the design of fpga / cpld clock when several types of commonly used. clock can be divided into the following four types: global clock, clock gating, multi-level logic clock clock and volatility. multi-clock system to include the above-mentioned four types

18、 of any combination of the clock. no matter what methods are the real circuit clock tree can not achieve the ideal assumption that the clock, so we must be based on an ideal clock, the clock real work to build a model to analyze the circuit, so as to make the circuit performance and the practical wo

19、rk as expected . clock in the actual model, we have to consider the spread of clock-tree skew, vertical jump and absolute bias and other uncertainties. to register, the clock was working along the arrival of the data terminal when it should have been stable, so as to ensure that the work along the s

20、ampling clock to the accuracy of the data, this data preparation time that we call set-up time (setup time). data should also be working along the clock to maintain over a period of time, this period of time known as the hold time (hold time). global clock for a design project, the global clock (or

21、clock synchronous) is the simplest and most predictable clock. in the pld / fpga design of the clock the best options are: by a dedicated global clock input pins of a single master clock-driven clock design projects to each flip-flop. as long as possible should be used in the design of global clock

22、projects. pld / fpga has a dedicated global clock pins, the device is directly connected to each register. global clock to provide such a device in the shortest possible delay to the output clock. clock-gated in many applications, the entire design of the overall use of external clock is not possibl

23、e or practical. with the product of pld logic array clock (that is, the clock is generated by the logic), to allow arbitrary function alone all trigger clock. however, when you use the array clock, the clock should be carefully analyzed the function, in order to avoid glitches. usually constitute th

24、e array clock clock-gated. clock gating often interface with the microprocessor, and used the address to write to control the pulse line. however, when using combination of flip-flop when the clock function, usually there is a clock-gated. if the following conditions, such as clock gating can be as

25、reliable as global clock work: drive the clock logic must contain only one and the door or a or gate. if any additional work in some state of logic, the competition will be the burr. a logic gate input as the actual clock, and the logic gate must be of all other input as the address or control lines

26、, in relation to their compliance with the establishment and maintenance of clock time bound. multi-level logic generated clock when the clock-gating logic of the combination of more than one (or more than the individual and doors or or gate), the evidence of the reliability of the design of the pro

27、ject has become very difficult. even if the prototype or simulation results show that there is no static dangerous, but in fact the risk may still exist. in general, we should not use multi-level combinational logic to clock the flip-flop in the pld design. traveling-wave clock clock another popular

28、 use of traveling-wave circuit is the clock, that is, the output of a flip-flop used as a clock input of another flip-flop. if careful design, traveling-wave clock can be the same as the global clock to work reliably. however, the traveling-wave clock made from time to time with the calculation of t

29、he circuit becomes very complicated. line-wave traveling-wave clock flip-flop of the chain have a greater clock time between the offset and exceed the worst case the set-up time, hold time and clock to the output circuit of the delay, allowing the system to the actual slowed down. multi-clock system

30、, many system requirements within the same multi-pld clock. the most common example is the two asynchronous interfaces between microprocessors, or microprocessors and asynchronous communication channel interface. as the clock signal between the two requirements to establish and maintain a certain ti

31、me, so that the above application from time to time the introduction of additional constraints. they also requested that some asynchronous synchronization signal. in many applications, only the synchronization of asynchronous signals is not enough, when the system of two or more non-homologous clock

32、, the data it is difficult to establish and maintain the time to be assured that we will face the complex matter of time . the best way is to all non-homologous clock synchronization. pld internal use of the lock loop (pll or dll) is a very good, but not all of pld with a pll, dll, and chip pll with

33、 most expensive, so unless there are special requirements, the general occasions pll can not use with the pld.at this time we need to take to enable the use of the d flip-flop-side, and the introduction of a high-frequency clock. 采用l ed 數(shù)碼管的數(shù)字顯示以其亮度高、顯示直觀等優(yōu)點被廣泛應用于智能儀器及家用電器等領域. 本文介紹一種以at89c52單片機為核心,以

34、共陽極高亮度l ed 數(shù)碼管作為顯示器件組成7 位數(shù)字顯示的實用多功能電子時鐘的設計,該時鐘可顯示星期、時、分、秒,也可切換為年、月、日顯示,同時具有整點音樂報時及定時鬧鐘等功能,也可作電子秒表使用。時鐘電路是計算機的心臟, 它控制著計算機的工作節(jié)奏就是通過復雜的時序電路完成不同的指令功能的。時鐘，自從它被發(fā)明的那天起，就成為人們生活中必不可少的一種工具，尤其是在現(xiàn)在這個講究效率的年代，時鐘更是在人類生產(chǎn)、生活、學習等多個領域得到廣泛的應用。然而隨著時間的推移，人們不僅對于時鐘精度的要求越來越高，而且對于時鐘功能的要求也越來越多，時鐘已不僅僅是一種用來顯示時間的工具，在很多實際應用中它還需要能

35、夠?qū)崿F(xiàn)更多其它的功能。諸如鬧鐘功能、日歷顯示功能、溫度測量功能、濕度測量功能、電壓測量功能、頻率測量功能、過欠壓報警功能等。鐘表的數(shù)字化給人們的生產(chǎn)生活帶來了極大的方便，而且大大地擴展了鐘表原先的報時功能。諸如定時自動報警、按時自動打鈴、時間程序自動控制、定時廣播、自動起閉路燈、定時開關烘箱、通斷動力設備、甚至各種定時電氣的自動啟用等，所有這些，都是以鐘表數(shù)字化為基礎的。可以說，設計多功能數(shù)字時鐘的意義已不只在于數(shù)字時鐘本身，更大的意義在于多功能數(shù)字時鐘在許多實時控制系統(tǒng)中的應用。在很多實際應用中，只要對數(shù)字時鐘的程序和硬件電路加以一定的修改，便可以得到實時控制的實用系統(tǒng)，從而應用到實際工作與

36、生產(chǎn)中去。因此，研究數(shù)字時鐘及擴大其應用，有著非?，F(xiàn)實的意義。隨著人類科技文明的發(fā)展，人們對于時鐘的要求在不斷地提高。時鐘已不僅僅被看成一種用來顯示時間的工具，在很多實際應用中它還需要能夠?qū)崿F(xiàn)更多其它的功能。高精度、多功能、小體積、低功耗，是現(xiàn)代時鐘發(fā)展的趨勢。在這種趨勢下，時鐘的數(shù)字化、多功能化已經(jīng)成為現(xiàn)代時鐘生產(chǎn)研究的主導設計方向。本文正是基于這種設計方向，以單片機為控制核心，設計制作一個符合指標要求的多功能數(shù)字時鐘。本設計基于單片機技術原理，以單片機芯片at89c52作為核心控制器，通過硬件電路的制作以及軟件程序的編制，設計制作出一個多功能數(shù)字時鐘系統(tǒng)。該時鐘系統(tǒng)主要由時鐘模塊、鬧鐘模塊

37、、環(huán)境溫度檢測模塊、液晶顯示模塊、鍵盤控制模塊以及信號提示模塊組成。系統(tǒng)具有簡單清晰的操作界面，能在4v7v直流電源下正常工作。能夠準確顯示時間（顯示格式為時時：分分：秒秒，24小時制），可隨時進行時間調(diào)整，具有鬧鐘時間設置、鬧鐘開/關、止鬧功能，能夠?qū)r鐘所在的環(huán)境溫度進行測量并顯示。設計以硬件軟件化為指導思想，充分發(fā)揮單片機功能，大部分功能通過軟件編程來實現(xiàn)，電路簡單明了，系統(tǒng)穩(wěn)定性高。同時，該時鐘系統(tǒng)還具有功耗小、成本低的特點，具有很強的實用性。由于系統(tǒng)所用元器件較少，單片機所被占用的i/o口不多，因此系統(tǒng)具有一定的可擴展性。時鐘設計無淪是用離散邏輯、可編程邏輯，還是用全定制硅器件實現(xiàn)的任何數(shù)字設計，為了成功地操作，可靠的時鐘是非常關鍵的。設計不良的時鐘在極限的溫度、電壓或制造工藝的偏差情況下將導致錯誤的行為，并且調(diào)試困難、花銷很大。在設計fpga/cpld時通常采用幾種時鐘類型。時鐘可分為如下四種類型：全局時鐘、門控時鐘、多級邏輯時鐘和波動式時鐘。多時鐘系統(tǒng)能夠包括上述四種時鐘類型的任意組合。無論采用何種方式，電路中真實的時鐘樹也無法達到假定的理想時鐘，因此我們必須依據(jù)理想時鐘，建立一個實際工作時鐘模型來分析電路，這樣才可以使得電路的實際工作效果和預期的一樣。在實際的時鐘模型中，我們要考慮時鐘樹傳播中的偏斜、跳變和絕對垂直的偏