SC設(shè)計(jì)方法與實(shí)現(xiàn)第十四章 IO環(huán)設(shè)計(jì)

1、soc設(shè)計(jì)方法與實(shí)現(xiàn)設(shè)計(jì)方法與實(shí)現(xiàn)郭煒郭煒 郭箏郭箏 謝憬謝憬第十四章第十四章i/o設(shè)計(jì)及封裝設(shè)計(jì)及封裝（二）（二） outlinesbasic structure of i/o cellsnoise cancellation esd protection schemei/o ring designpackage selectionpackage functionssignal distributionpower distributionheat dissipationcircuit support and protection from environmenta space transfor

2、mer between the fine pitch grid of ic and the pcb (printed circuit board) pitch gridsingulationmoldingsolder ball attachpackaging process sawingwire bondingdiedie attachwaferwiresubstratepackingfinal testsolder ballmolding compoundtypical ic packageball grid array (bga)small outline packagedual-in-l

3、ine packageplastic pin grid arrayplastic quad flat packagechip scale package (csp)system in package (sip)plastic leaded chip carrierthin outline packageindustry packing trendsball grid array (bga) bga is a die-up design, plastic over-molded bga using 2-4 layer bt substrate more advantage of bgaimpro

4、ved electrical performance due to shorter distance between the chip and the solder ballsimproved thermal performance by use of thermal vias, or heat dissipation through power and ground plane incorporated in the substratereduced handling-related lead damages due to use of solder balls instead of met

5、al leadswhen reflow attached to boards, the solder balls self align leading to higher manufacturing yieldsflip chip packagespros good electrical performance(reduced inductance) good thermal performance w/heat sink large number of die pads per die areasmall die size and low package heightcons high co

6、st solution board level reliability concernsdirect solder bumping onto the die, placing the interconnection bump directly onto the substrate, eliminating the need for wire bonding. substrate(organic or ceramic)chipsolder bumpsolder ballsolder ballpolymer 1redistribution metalchippolymer 1solder ball

7、passivationubmchipsi wafersolderubmpassivationwafer scale cspmulti chip package (mcp)it also called sip (system in package)high performance nlow noisenlow power consumptionnoptimizing board space commonly used in handheld applicationproblem: reduced assembly yield, high testing castpackage driversel

8、ectricalthermalmechanicalcostpackage body sizei/o countdie sizereliabilitypackage selection processthermal effectpower consumption generates heat and raises temperaturecircuit performance degrades due to slower mosfet switching speed in high temperaturemore susceptible to reliability problems in hig

9、her temperaturenoxide breakdownnhot-electron effectnhigher leakage currentthermal performance and improvementladding thermal pads to improve thermal performancela typical power bga (pbga) structure:thermal simulationthermal ballspbga has thermal path through thermal via and ballpackaging general gui

10、delinespackages affect both power supply delivery and signal integritywirebond packagesnalways use package with a ground planennever use for high power designs (too much ir drop, noise)nnever use above 4gbpsflip chip packagesnalways use for 4+gbpsnalways use for high power systemsncan be the best po

11、wer, best performancenmore knowledge needed to buildncan be built poorly 3c package evolutionpackage technology trendsreduction in area, volume and weight increased i/o count improved thermal / electrical performance improved reliability potential for multi-chip package, system in package reduced capital cost for assembly and test green products (pb-free, halogen-free)conclusionslthere is no one package for all applicationslflip chip provides the best electrical performancelpbga provides the best thermal performancelleaded packages provide the best board