IC制造流程簡介課件

IC制造流程簡介

ANDY相關(guān)定義半導(dǎo)體是指導(dǎo)電能力介于導(dǎo)體和非導(dǎo)體之間的材料，其指四價硅中添加三價或五價化學(xué)元素而形成的電子元件，它有方向性可以用來制造邏輯線路使電路具有處理資訊的功能。半導(dǎo)體的傳導(dǎo)率可由攙雜物的濃度來控制：攙雜物的濃度越高，半導(dǎo)體的電阻系數(shù)就越底。P型半導(dǎo)體中的多數(shù)載體是電洞。硼是P型的摻雜物。N型半導(dǎo)體的多數(shù)載體是電子。磷，砷，銻是N型的攙雜物。相關(guān)定義集成電路是指把特定電路所需的各種電子元件及線路縮小并制作在大小僅及2CM平方或更小的面積上的一種電子產(chǎn)品。WaferStartCMPOxidationPVD,

CVDWaferCleaningPhotolithographyEtch(DryorWet)AnnealingImplantationTheOutlineWaferStartCMPWaferCleaning製程TheIntroductiontoTheManufacturingProcessof

VLSI

ANDYMeltSeedGraphiteCrucibleGrowingCrystalNoncontaminatingLiner(a)Seedbeinglowereddowntomelt(b)Seeddippedinmeltfreezingonseedjustbeginning(b)PartiallygrowncrystalTheCzochralskiMethod-1(a)As-growncrystal(b)Grindcrystaltoremoveundulationsandsawtoremoveportionsinresistiverange(c)Sawintoslices(withorientingflatsgroundbeforesawing)(d)Roundedgesofslicebygrinding(e)PolishsliceCrystaltoWafe微影(Photolithography)原理：

在晶片表面上覆上一層感光材料，來自光源的平行光透過光罩的圖形，使得晶片表面的感光材料進行選擇性的感光。

感光材料：

正片－經(jīng)過顯影(Development)，材料所獲得的圖案與光罩上相同稱為正片。

負(fù)片－如果彼此成互補的關(guān)係稱負(fù)片ContinueWaferWaferWaferDevelopresistEtchoxideStripresistDevelopedresistshowingpatternEtchtomatchresistpatternResistremovedPhotolithographyProcess-2Doping:

Togettheextrinsicsemiconductorbyaddingdonorsoracceptors,whichmay causetheimpurityenergylevel.Theactionthataddingparticularimpuritiesinto thesemiconductoriscalled“doping”andtheimpuritythataddediscalledthe “dopant”.IntroductiontoDopingDopingmethods:1.Diffusion2.IonImplantationPre-deposition:

Toputtheimpuritiesonthewafersurface.Generallyuseddopantresourcefurnacedesign:CarriergasHeaterQuartztubeSoliddopantsourcefurnaceO2LiquiddopantsourceCarriergasGasdopantsourceValveO2(a)(c)(b)DiffusionProcess

-1Soliddopantsource1.Thedefinition:

Amanufacturingprocessthatcanuniformlyimplantstheionsintothe waferinthespecifieddepthandconsistencebyselectingand acceleratingions.2.Thepurpose:

Tochangetheresistancevalueofthesemiconductorbyimplantingthe dopant.3.Energyrange(8yearsago)

(1)Generalprocess：10KeV-180KeV(>0.35m) (<100KeVfor0.18mnow) (2)Advancedprocess：10KeV-3MeV(<0.5m) (3)R&Dprocess：0.2KeV-5KeVIntroductiontoIonImplantationDopantSourceIonSourceMassAnalysisAcceleratorScannerElectronShowerIonImplanterExtractorFaradyCapParametersDopingelementsselectionScanninguniformitycontrolTemperaturecontrolConcentrationcontrolFactorsTheselectionoftheionresourceThedesignofthemassanalyzerScanningsystemVacuumcontrolPrecisewaferpositioncontrolPreciseandstableelectricpowersupplierThemeasurementoftheioncurrent(FaradyCup)DopingParametersChemicalVaporDeposition(a)Reagentsdiffusethroughtheinterfaceboundarylayer(b)Adsorbedontothewafersurface(c)Depositionreactionhappens(d)Byproductsdiffusethroughtheinterfaceboundarylayer(e)Reagents&byproductspassawayHeatSource(a)(d)(b)(c)(e)ReactionMainStream

InterfaceBoundaryLayerWafersurfaceVacuumSystem(1)ThermalOxidation

Thegrowthtemperature

isabove9000C.HighqualitySiO2.

(2)LowPressureCVD(LPCVD)Thegrowthtemperatureisaround400

0C

to750

0C.Betterstepcoverageability.

(3)PlasmaEnhancedCVD(PECVD)

Thegrowthtemperatureisunder400

0C.

InthecaseoftheAldepositionandnon-thermalprocess.

SolutionstoDepositionDownForcewaferWaferCarrierCarrierFilmSlurryCarrierWaferInterconnectsCompositePadTablePolishingPadPolishingtablepCMPSystemSchematicCarrierFilmcSlurryParticle(0.1~2.0um)Silica(Colloidal)

Alumina(Dispersed)Liquor(ContainssomeoxidantandorganicreagentsinthecaseofmetalCMP)KOHNH4OHWaferCleaningPurpose:

ToremovetheremainsandimpuritiesMethods:BrushCleaningSprayCleaningUltrasonicCleaningPhotoresistSiO2SiSubstratePhotoMaskPositiveResistNegativeResistEtchingIntro-1NextPageEtchingMethods

WetEtching(Isotropic)

RelativelysimpleprocessHighthroughputLowquality

DryEtching(Anisotropic)

Highquality(duetotheexcellentpatterntransferability)WorseselectivityWetEtchingSubstrateThinFilmSolutionBoundaryLayerReagentResultantReactionPhotoResist(a)IsotropicEtching：A=0(Erh=Erv)(b)AnisotropicEtching：A=1(Erh=0)Isotropic&AnisotropicQuartzdomeSiliconwaferSiliconcarbidecoatedgraphiteRFCoilGasinGasexitSiliconcarbidesusceptorGasexitSiliconwafersRFinductionheatingcoilDryEtchingSystem-1(a)SputteringEtching(b)PlasmaEtching(c)ReactiveIonEtchingIonReactiveIonVolatileProductVolatileProductReactiveIonRIESchemeDiagramof

RIESystemGasInToVacuumPumpPlasmaElectrodeRFAnnealingSiO2PostIonImplantationAnnealingRTPFurnaceReactionRoomGasin(H2)Wafer3-ZoneHeatingElementGasoutGasin(O2)Lo