aps有效文件單片機(jī)-english

1、微處理器（sor、微型計(jì)算機(jī)puter、單片機(jī)（Single-A sor incorporates(表現(xiàn)為) the functions of a computers central unit (CPU)onaegratedcircuit,1(IC)oratmostafew egratedcircuits(集成電路作為 器（RAM、ROM和EPROM等Aputer is a computer微處理器（sor、微型計(jì)算機(jī)puter、單片機(jī)（Single-A sor incorporates(表現(xiàn)為) the functions of a computers central unit (CPU)o

2、naegratedcircuit,1(IC)oratmostafew egratedcircuits(集成電路作為 器（RAM、ROM和EPROM等Aputer is a computer sor as its central sing unit. includes sor, memory, and input/output (I/O). They are physically small . keyboardandscreenfor input and output)are alcomputers 塊Amicrocontroller(sometimes abbreviated（縮寫）CuCo

3、rMCU) is asmall computer on circuitaprogrammableinput/output器件）. Program he form of flashorOTP ROMis also often included on chip, as well as a typically small amount of thesorsusedalcomputersorothergenerale , ALU 。Inanunita tperformsarithmeticandlogicaloperations. TheALUisafundamental（基本的）building o

4、f the central sing unit of a computer, and even the simplest sors one for ech as ma aining timers. The sors found inside modern CPUs graphics（圖解計(jì)算）singunitsmodate（適應(yīng)）erfulandcomplexALUs;asinglecomponentmaycontainanumberof Incomputing and lly in computer hardware, controller isachip, ancard, a stand-

5、alone （獨(dú)）device (usually called a control Incomputing and lly in computer hardware, controller isachip, ancard, a stand-alone （獨(dú)）device (usually called a control tripheraldevice.Thismaybealinkntwopartsofacomputer(for leatmanagesstomemoryforthecomputeroracontrolleronanexternal （部tmanagestheoperationo

6、f(andconnectiont bus累加器（A）accumulator：運(yùn)算前用于保存操作數(shù)，運(yùn)算后用于保存結(jié)果。anaccumulatorisaregister inermediatearithmeticandlogicresultsare TheMemory Data Register (MDR) istheregister ofa computerst containsdata to be stored in the computer storage (e.g. RAM), or the data after a fetch from computer storage. It act

7、s like a buffer(緩存區(qū)) and holds t is copied from memoryreadyforthe sortouse（ID：IRIncomputing, aninstruction register (IR) is the part of aCPUs instructioncurrentlybeingexecutedort stores The program counter (PC)is a computerisinitsinstructionsor t indicates where TheMemory Address Register (MAR)is aC

8、PUt either stores the address from which data will befetched to the CPU or the address to which data will be and 器還接收CPU的控制信號(hào)，以確定執(zhí)行讀/Connect puter with the 8 bit address bus and 8 bit data bus, address bus groupofeightdata 器還接收CPU的控制信號(hào)，以確定執(zhí)行讀/Connect puter with the 8 bit address bus and 8 bit data b

9、us, address bus groupofeightdata CPU to the memory address decoder, todetermineselected unit. The storage receives CPU signals determinetheread/write Theconnectionofexternal andsormust go througherface adapter(I erface),eachI/erface and the corresponding external device has a fixed （Binarymlc計(jì)算機(jī)中常用編

10、碼：BCD（BinaryCodedDecimal）ASCII（American StandardCodeMachinenumber:thecomputerexpressed numbersinTrue value: the value represented by the number of machines The absolute value ofthe ode+theabsolutevalueoftheoriginalcode=Theabsolute value of the absolute value of the negativecomplement, -1 = negative

11、the Overflow: refers to the result of the operation number of symbols of beyond the -128-range,anddestroyedthesign l Function Register，用以存放可以讀 Two l Function Register，用以存放可以讀 Two 16-bit timer / counters, each of which can be set for the count to count events,sobesetfortimingcontrolcomputer,andaccord

12、ingtothecountor 一個(gè)全雙工 full UART（ 通用異步接收發(fā)送器 Universal 行通信(UsedtoimplementserialcommunicationandPC.)nthemicrocontrollerorOn-cillator and clock generation circuit, but the need for external quartz 來(lái)選擇的省電方式空閑方式（Idle Mode）和掉電方式Mode15%；掉電方式中，片內(nèi)振蕩器停止工作，一切工作暫停，只保存片內(nèi) RAM 中的內(nèi)容，直到下一次硬件復(fù)位為止，此時(shí)電流降至Compared with

13、8051, er-saving work, leisure er-down Operating frequency can be reduced to 0Hz, wo software saving- idlemode(IdleMode)er-downmodeerDown,theMode),theMode stops the CPU, RAM, timer / counters, serial line port errupt system continueworking,thecurrent can bereducedto 15% oferdown mode, on-cillator to

14、stop working, all work spended, only to save the contents theon-chip RAM, untilthe rdware reset.Thecurrent dropsbelow15 sminimumto0.6. WhenmultipleMCUtocompeteusingtheexternalbus,youcancontrolthebus 11. 89C51的CPU運(yùn)算器：包括 ALU，8 位暫存器 1. WhenmultipleMCUtocompeteusingtheexternalbus,youcancontrolthebus 11.

15、 89C51的CPU運(yùn)算器：包括 ALU，8 位暫存器 1（TMP1）temporary)、暫存器 2（TMP2，8ACCB 和程序狀態(tài)寄存器PSW Program ACCisoften used asanoperand操作數(shù))by othe ALUinputoperator theotherfromtheTMP1theoperandsconducted,theresultssentbacktotheThePSWisusedtoindicatetheusinformationoftheinstruction Bregistermultiply,andperationswhenusedtosto

16、reoperands,alsousedstorepartoftheresultsofheabsenceofoperation,canbeusedgeneral-eregisters.ThereisabitaccumulatorCforhandlingbit 。The program counter by two 8-bit CH and PCL, a total of 16, save addressofthenextinstructiontobeexecuted.Oscillatorandtimingcircuitsneedexternal quartz crystal and freque

17、ncy tuning capacitor, the frequency of 0-24MHz, basic beat ofthe pulse signal as the 89C51, the smallesttime unit.12. 單片機(jī)引腳結(jié)構(gòu)圖（圖示2. XTAL1（19 腳）XTAL2（18 腳。XTAL2 crystalpinsis(19feet)andare (18feet). XTAL2 pick end ofthe external crystal fine-tuning capacitor, the output of ernal circuitXTAL1 isconnec

18、tedtothe otherside,theinputofernaloscillation circuitfrequencyisthenatural frequencyofthecrystal,tochecktheoscillationcircuitis working properly,canbeusedoscilloscopeviewXTAL2whetherthec ntisapulseoutput.Ifanexternalclock, XTAL2 should be left unconnected, XTAL1 is RST、ALE、PSEN/EA/。RSTcircuitfrequen

19、cyisthenatural frequencyofthecrystal,tochecktheoscillationcircuitis working properly,canbeusedoscilloscopeviewXTAL2whetherthec ntisapulseoutput.Ifanexternalclock, XTAL2 should be left unconnected, XTAL1 is RST、ALE、PSEN/EA/。RST（9 腳完成復(fù)位。ALE（Address latch enable，30 腳）89C51正常工作時(shí)，ALE 好壞。器29 腳） 89C51 Cont

20、rol signal pins, RST, ALE, PSEN / and EA / RST (9 feet): to ma ain two machine cycles high to complete reset. ALE (Address the latch the enable, 30 feet) 89C51 properly,theALEitivepulse signal,afrequency of 1/6ofthe oscillatorfrequency,candetermine thechipis good or bad.CPUto soff-chip memory,the AL

21、Esignal as a latched low eight address control signal. PSEN (ProgramStore Enable, memory,29feet)to memoryinstruction basis of the chipmemory address allow the output terminal, when the89C51 chip fetch machine cycle output two pulses work. EA (Enable Address, 31 feet) onlytoallowtheinput,thenthehighc

22、sFlashROM,thenthelowstoexternalInput / output portsP0-P3.Quasi-t isusedastheinput, you shouldwriteaport multiplexing 13. 64KB ROM 64KBROM1000H- FH，片內(nèi)外 編址。RAM 用于存放運(yùn)算的中間結(jié)果、數(shù)據(jù)暫存和緩沖、標(biāo)志位等，片內(nèi) 256 字節(jié)，地址從 0000H-00FFH，片外從 0100H- FH128RAM RAM32字節(jié)（00-1F）為thechipcanbeexpandedupto64KBROM,theFH,ece inside and the

23、unifiedaddressing.RAMusedtostore ermediateresultsofoperationsfortemporarystorage and buffering flag, on-chip256-byte address from 0000H-00FFH, off-chip FH.Thelower128bytesofon-chipRAMisreallytheRAMarea,ofwhichthereare89C51 64KB ROM and data memory for the memory: program memory, 64KB of RAM.ROM storing programmed procedures and table data, on-chip Flash ROM 4KBad