JESD47I中文版Word版

1、傳播優(yōu)秀Word版文檔 ，希望對您有幫助，可雙擊去除！IC集成電路壓力測試考核JEDEC STANDARD Stress-Test-Driven Qualification of Integrated Circuits JESD47I (Revision of JESD47H.01, April 2011) JULY 2012 JEDEC SOLID STATE TECHNOLOGY ASSOCIATION 傳播優(yōu)秀Word版文檔 ，希望對您有幫助，可雙擊去除！NOTICE JEDEC standards and publications contain material that has b

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3、cilitating interchangeability and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for use by those other than JEDEC members, whether the standard is to be used either domestically or internationally. JEDEC standards and publicatio

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5、ormation included in JEDEC standards and publications represents a sound approach to product specification and application, principally from the solid state device manufacturer viewpoint. Within the JEDEC organization there are procedures whereby a JEDEC standard or publication may be further proces

6、sed and ultimately become an ANSI standard. No claims to be in conformance with this standard may be made unless all requirements stated in the standard are met. Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publication should be addressed to JEDEC at the add

7、ress below, or refer to under Standards and Documents for alternative contact information. Published by JEDEC Solid State Technology Association 2012 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 This document may be downloaded free of charge; however JEDEC retains th

8、e copyright on this material. By downloading this file the individual agrees not to charge for or resell the resulting material. PRICE: Contact JEDEC Printed in the U.S.A. All rights reserved 傳播優(yōu)秀Word版文檔 ，希望對您有幫助，可雙擊去除！ PLEASE! DONT VIOLATE THE LAW! This document is copyrighted by JEDEC and may not

9、be reproduced without permission. For information, contact: JEDEC Solid State Technology Association 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 or refer to under Standards-Documents/Copyright Information. 傳播優(yōu)秀Word版文檔 ，希望對您有幫助，可雙擊去除！傳播優(yōu)秀Word版文檔 ，希望對您有幫助，可雙擊去除！STRESS

10、 DRIVEN QUALIFICATION OF INTEGRATED CIRCUITS IC集成電路壓力測試考核 (From JEDEC Board Ballot, JCB-12-24, formulated under the cognizance of the JC14.3 Subcommittee on Silicon Devices Reliability Qualification and Monitoring.) 通過JEDEC委員會JCB-12-24號投票，在JC14.3硅晶圓器件可靠性考核和監(jiān)控小組委員會審理后系統(tǒng)地闡述和制定1 Scope 范圍 This standard

11、describes a baseline set of acceptance tests for use in qualifying electronic components as new products, a product family, or as products in a process which is being changed. 這個文檔描述了用于考核新產(chǎn)品、同族器件或工藝變更的可接受的基準測試標準These tests are capable of stimulating and precipitating semiconductor device and packagi

12、ng failures. The objective is to precipitate failures in an accelerated manner compared to use conditions. Failure Rate projections usually require larger sample sizes than are called out in qualification testing. For guidance on projecting failure rates, refer to JESD85 Methods for Calculating Fail

13、ure Rates in Units of FITs. This qualification standard is aimed at a generic qualification for a range of use conditions, but is not applicable at extreme use conditions such as military applications, automotive under-the-hood applications, or uncontrolled avionics environments, nor does it address

14、 2nd level reliability considerations, which are addressed in JEP150. Where specific use conditions are established, qualification testing tailored to meet those specific requirements can be developed, using JESD94 that will result in a better optimization of resources. 這些測試用于加速和誘發(fā)半導體器件和封裝的失效。目的是通過比

15、使用環(huán)境相比加速的方式來促成失效。相比考核測試，失效率的預測需要更多的樣品數(shù)量。如果需要計算預期的失效率，請參考JESD85 Methods for Calculating Failure Rates in Units of FITs。本考核標準用于制定一系列適用于一般使用環(huán)境下的通用考核標準，而不是用于例如軍工應用，汽車電子，或者不受控的航天電子等極端使用環(huán)境；同時本標準也不解決JEP150標準中提出的2nd等級可靠性問題。在確定具體使用條件的情況下，可以使用JESD94開發(fā)適合于滿足這些特定要求的考核測試，從而更好地優(yōu)化測試資源。This set of tests should not b

16、e used indiscriminately. Each qualification project should be examined for: a) Any potential new and unique failure mechanisms. b) Any situations where these tests/conditions may induce invalid or overstress failures. 注意：不要不加選擇地使用本文檔中的測試。 應對每個考核項目進行確認：a）是否存在任何潛在的新的和獨特的失效機制。b）任何測試或使用條件可能導致的失效或過應力失效情況

17、。If it is known or suspected that failures either are due to new mechanisms or are uniquely induced by the severity of the test conditions, then the application of the test condition as stated is not recommended. Alternatively, new mechanisms or uniquely problematic stress levels should be addressed

18、 by building an understanding of the mechanism and its behavior with respect to accelerated stress conditions (Ref. JESD91, “Method for Developing Acceleration Models for Electronic Component Failure Mechanisms” and JESD94, “Application Specific Qualification using Knowledge Based Test Methodology”)

19、. 傳播優(yōu)秀Word版文檔 ，希望對您有幫助，可雙擊去除！ Consideration of PC board assembly-level effects may also be necessary. For guidance on this, refer to JEP150, Stress-Test-Driven Qualification of and Failure Mechanisms Associated with Assembled Solid State Surface-Mount Components. This document does not relieve the s

20、upplier of the responsibility to assure that a product meets the complete set of its requirements. 如果已知或懷疑失效是由于新機制或者獨特的嚴苛測試條件引起，則不建議使用本文檔描述的測試條件。 作為一種選擇，可以通過理解器件在加速應力條件下的失效機制和表現(xiàn)，來解決新的失效機制或獨特的失效問題（參考JESD91，“電子元器件失效機制加速模型的研究方法”和JESD94，“基于測試方法學的特殊考核“）。必須需要考慮PCB板級封裝的影響。 有關這方面的指導，請參閱JEP150，與SMT貼裝元件相關的壓力測

21、試考核和失效機制。本文件并不免除供應商確保產(chǎn)品符合其全部要求的責任。 2 Reference documents 參考文件 The revision of the referenced documents shall be that which is in effect on the date of the qualification plan. 2.1 Military 軍工級 MIL-STD-883, Test Methods and Procedures for Microelectronics MIL-PRF 38535 2.2 Industrial 工業(yè)級 UL94, Tests f

22、or Flammability of Plastic Materials for Parts in Devices and Appliances. ASTM D2863, Flammability of Plastic Using the Oxygen Index Method. IEC Publication 695, Fire Hazard Testing. J-STD-020, Joint IPC/JEDEC Standard, Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface-M

23、ount Devices. 傳播優(yōu)秀Word版文檔 ，希望對您有幫助，可雙擊去除！JP-001, Foundry Process Qualification Guidelines (Wafer Fabrication Manufacturing Sites). JESD22 Series, Reliability Test Methods for Packaged Devices JESD46, Guidelines for User Notification of Product/process Changes by Semiconductor Suppliers. JESD69, Info

24、rmation Requirements for the Qualification of Silicon Devices. JESD74, Early Life Failure Rate Calculation Procedure for Electronic Components. JESD78, IC Latch-Up Test. JESD85, Methods for Calculating Failure Rates in Units of FITs. JESD86, Electrical Parameters Assessment. JESD94, Application Spec

25、ific Qualification using Knowledge Based Test Methodology. JESD91, Methods for Developing Acceleration Models for Electronic Component Failure Mechanisms. JEP122, Failure Mechanisms and Models for Semiconductor Devices. JEP143, Solid State Reliability Assessment Qualification Methodologies. JEP150,

26、Stress-Test-Driven Qualification of and Failure Mechanisms Associated with Assembled Solid State Surface-Mount Components. JESD201, Environmental Acceptance Requirements for Tin Whisker Susceptibility of Tin and Tin Alloy Surface Finishes JESD22A121, Test Method for Measuring Whisker Growth on Tin a

27、nd Tin Alloy Surface Finishes 3 General requirements 通用要求 3.1 Objective 目標 The objective of this procedure is to ensure that the device to be qualified meets a generally accepted set of stress test driven qualification requirements. Qualification is aimed at components used in commercial or industri

28、al operating environments. 本考核流程目的是確保器件能夠通過一套通用的可接受的壓力測試要求。主要考核目標是針對在商業(yè)或工業(yè)工作環(huán)境中使用的器件3.2 Qualification family 同族考核 While this specification may be used to qualify an individual component, it is designed to also qualify a family of similar components utilizing the same fabrication process, design rule

29、s, and similar circuits. The family qualification may also be applied to a package family where the construction is the same and only the size and number of leads differs. Interactive effects of the silicon and package shall be considered in applying family designations. 傳播優(yōu)秀Word版文檔 ，希望對您有幫助，可雙擊去除！雖

30、然本規(guī)范用于單個器件的考核，但也可用于驗證使用相同晶圓制造工藝，設計規(guī)則和相似電路設計的同族器件。同時也可以用于驗證結(jié)構(gòu)相同但只有尺寸和管腳數(shù)量不同的封裝類別。 使用同族定義時應考慮硅晶圓和封裝的相互作用。3.3 Lot requirements 批次需求 Test samples shall comprise representative samples from the qualification family. Manufacturing variability and its impact on reliability shall be assessed. Where applicab

31、le the test samples will be composed of approximately equal numbers from at least three (3) nonconsecutive lots. Other appropriate means may be used to evaluate manufacturing variability. Sample size and pass/fail requirements are listed in Tables 1-3. Tables A and B give guidance on translating pas

32、s/fail requirements to larger sample sizes. Generic data and larger sample sizes may be employed based upon a Chi Squared distribution using a total percent defective at a 90% confidence limit for the total required lot and sample size. ELFR requirements shall be assessed at a 60% confidence level a

33、s shown in Table B. If a single unique and expensive component is to be qualified, a reduced sample size qualification may be performed using 1/3 the sample size listed in the qualification tables. 測試樣品應包含同族器件中的代表性樣品， 需要評估生產(chǎn)波動性對可靠性的影響。 在適當?shù)那闆r下，需要從至少三個非連續(xù)批次中抽取相同數(shù)量的樣品，或者使用其他適合評估生產(chǎn)波動性的方法。 表1-3中列出了測試樣本量

34、和合格/不合格的要求。 表A和B給出了更大樣本量情況下的合格/不合格要求。對于所有需要評估的批次和樣品，可以基于卡方分布（90%可信度的總失效率），使用通用的數(shù)據(jù)和更大的樣品數(shù)量。 ELFR要求按照表B所示的60可信度進行評估。如果要對一個獨特且昂貴的器件進行考核評估，則可以使用考核表中列出的1/3樣本量。3.4 Production requirements 產(chǎn)品要求 All test samples shall be fabricated and assembled in the same production site and with the same production proce

35、ss for which the device and qualification family will be manufactured in production. Samples need to be processed through the full production process including burn-in, handling, test, and screening. 所有測試樣品需要使用相同的生產(chǎn)地點和流程進行制造和封裝，并且生產(chǎn)過程中需要使用相同的生產(chǎn)工藝。 樣品需要完成整個生產(chǎn)流程，包括老化，搬運，測試和篩選。 3.5 Reusability of test

36、samples測試樣品的可復用性 Devices that have been used for nondestructive qualification tests may be used to populate other qualification tests. Devices that have been used in destructive qualification tests may not be used in subsequent qualification stresses except for engineering analysis. Non-destructive

37、qualification tests are: Early Life Failure Rate, Electrical Parameters Assessment, External Visual, System Soft Error, and Physical Dimensions. 傳播優(yōu)秀Word版文檔 ，希望對您有幫助，可雙擊去除！用于非破壞性考核測試的器件可以繼續(xù)用其他考核測試。 除了工程分析之外，已用于破壞性考核測試的器件不得用于隨后的壓力測試。 非破壞性考核測試包括：早期失效率，電氣參數(shù)測試，外觀檢查，系統(tǒng)軟失效和物理尺寸測試。 3.6 Definition of electr

38、ical test failure after stressing 壓力測試后電氣失效定義 Post-stress electrical failures are defined as those devices not meeting the individual device specification or other criteria specific to the environmental stress. If the cause of failure is due to causes unrelated to the test conditions, the failure sh

39、all be discounted. 壓力測試后的電氣失效定義是指不符合器件電氣參數(shù)規(guī)范或其他環(huán)境壓力測試規(guī)范。 如果失敗的原因是與測試條件無關的情況造成的，則不記為失效。 3.7 Required stress tests for qualification 考核所需要的壓力測試 Table 1, Table 2, and Table 3 list the qualification requirements for new components. Table 2 and Table 3 are differentiated by package type, but these are no

40、t exclusively packaging tests. Interactive effects of the packaging on the silicon also drive the need for tests in Table 2 and Table 3. Power supply voltage for biased reliability stresses should be Vcc max or Vdd max as defined in the device datasheet as the maximum specified power supply operatin

41、g voltage, usually the maximum power supply voltage is 5% to 10% higher than the nominal voltage. Some tests such as HTOL may allow for higher voltages to gain additional acceleration of stress time. JEP122 can provide guidance for accelerating common failure mechanisms. Table 4 lists the required s

42、tresses for a qualification family or category of change. Interactive effects from the unchanged aspects of both the silicon and packaging must be assessed. 表1，表2和表3列出了新器件的考核要求。 表2和表3按封裝類型區(qū)分(氣密性和非氣密性)，但也不只是封裝的相關測試。 硅基板和封裝材料的相互作用也需要參考表2和表3中的測試進行評估。偏置應力可靠性測試的電源電壓應該是器件數(shù)據(jù)手冊中定義的最大工作電壓Vcc max或Vdd max（通常最大

43、電源電壓比額定工作電壓高5至10）。一些測試（如HTOL）可能允許更高的電壓來獲得額外的應力加速比例。 JEP122可以為加速常見失效機制提供指導。表4列出了考核 器件族或類別 變更所需的壓力測試。硅晶圓和封裝中都未改變部分的相互作用也必須評估。3.8 Pass/Fail criteria 合格/不合格標準 Passing all appropriate qualification tests specified in Table 1, Table 2, and Table 3, either by performing the test, showing equivalent data wi

44、th a larger sample size, or demonstrating acceptable generic data (using an equivalent total percent defective at a 90% confidence limit for the total required lot and sample size), qualifies the device per this document. When submitting test data from generic products or larger sample sizes to sati

45、sfy the Table 1, Table 2, and Table 3 qualification requirements of this document, the number of samples and the total number of defective devices occurring during those tests must satisfy 90% confidence level of a Poisson exponential binomial distribution, as defined in MIL-PRF 38535. 傳播優(yōu)秀Word版文檔 ，

46、希望對您有幫助，可雙擊去除！MIL-PRF 38535 is available for free from /Programs/MilSpec/listdocs.asp?BasicDoc=MIL-PRF-38535. The minimum number or samples for a given defect level can be approximated by the formula: N = 0.5 2 (2C+2, 0.1) 1/LTPD 0.5 + C where C = accept #, N=Minimum Sample Siz

47、e, 2 is the Chi Squared distribution value for a 90% CL, and LTPD is the desired 90% confidence defect level. Table A is based upon this formula, but in some cases the sample sizes are slightly smaller than MIL-PRF-38535. 不管是通過執(zhí)行測試，還是通過大樣本量給出等效的數(shù)據(jù)，或者給出可接受的通用數(shù)據(jù)（對于所有需要評估的批次和樣品，使用等效的有90%置信度的總的失效百分比），來通

48、過表1，表2和表3中指定的所有適合的考核測試。當提交來自一類產(chǎn)品或大樣本量的測試數(shù)據(jù)來滿足本文檔中表1，表2和表3的考核要求時，這些測試的樣本數(shù)量和出現(xiàn)的缺陷器件數(shù)量必須滿足90%置信水平的泊松指數(shù)二項分布，詳細定義參考MIL-PRF 38535。MIL-PRF 38535可以通過/Programs/MilSpec/listdocs.asp?BasicDoc=MIL-PRF-38535.免費下載。給定缺陷水平的最小數(shù)量或樣本可以用下式近似： N = 0.5 2 (2C+2, 0.1) 1/LTPD 0.5 + C 其中C = accept，N =最小

49、樣品數(shù)量，2是90置信度的卡方分布值，LTPD是期望的具有90置信度的缺陷級別。 表A基于此公式，但在某些情況下，樣品數(shù)量略小于MIL-PRF-38535。3.8 Pass/Fail criteria (contd) 合格/失效標準表A 在90的置信度下，樣本量對應的最大缺陷百分比（LTPD：Lot Tolerance Percent Defective批次缺陷百分比公差）傳播優(yōu)秀Word版文檔 ，希望對您有幫助，可雙擊去除！ EXAMPLE: Using generic data for HTOL with a requirement of 0 rejects from 230 sample

50、s. If 700 samples of generic data are available, the maximum number of failures that will meet the qualification test requirement is 3 failures from the LTPD=1 column. 示例：要求測試230個樣本中有失效0顆的HTOL 測試（對應的最大缺陷率是1%，置信度為90%）。 如果有700個通用數(shù)據(jù)可用，那么符合考核測試要求的最大失效數(shù)量是LTPD = 1列668對應的3顆失效。 4 Qualification and requalifi

51、cation 考核和重新考核 4.1 Qualification of a new device 新器件考核 New or redesigned products (die revisions) manufactured in a currently qualified qualification family may be qualified using one (1) wafer/assembly lot. Electrical parameter assessment is one of the most important tests to run. 對于一個當前已考核的同族系列中，進

52、行新設計或重新設計的產(chǎn)品（芯片版本），可以只使用一個晶圓或者封裝批次進行考核，電氣特性是需要進行的最重要的測試之一 4.2 Requalification of a changed device 器件變更的重新考核 傳播優(yōu)秀Word版文檔 ，希望對您有幫助，可雙擊去除！Requalification of a device will be required when the supplier makes a change to the product and/or process that could potentially impact the form, fit, function, qu

53、ality and/or reliability of the device. The guidelines for requalification tests required are listed in Table 4. 當供應商對產(chǎn)品或制程進行的更改影響到了器件的外形，適配性，功能，質(zhì)量或可靠性時，需要進行器件的重新考核。 表4列出了所需的重新考核試驗指導。4.2.1 Process change notification PCN過程變更通知 Supplier will meet the requirements of JESD46 Guidelines for User Notific

54、ation of Product/Process Changes by Semiconductor Suppliers for product/process notification changes. 對產(chǎn)品和過程的變更通知，供應商需要符合JESD46“半導體供應商對產(chǎn)品/工藝變更的用戶通知指南”中的要求。4.2.2 Changes requiring requalification 變更的重新考核 All product/process changes should be evaluated against the guidelines listed in Table 4. 所有產(chǎn)品和工藝

55、變更需要按照表4的指導方案進行評估4.2 Requalification of a changed device (contd) 4.2.3 Criteria for passing requalification 重新考核的通過標準 Table 4 lists qualification plan guidelines for performing the appropriate Table 1, Table 2, and Table 3 stresses. Failed devices should be analyzed for root cause and correction; on

56、ly a representative sample needs to be analyzed. Acceptable resolution of root cause and successful demonstration of corrective and preventive actions will constitute successful requalification of the device(s) affected by the change. The part and/or the qualification family can be qualified as long

57、 as containment of the problem is demonstrated until corrective and preventive actions are in place. 表4列出了執(zhí)行適當?shù)谋?，表2和表3壓力測試的考核計劃。 對于失效器件，需要分析根本原因并糾正; 但是只需要分析其中一個代表性的樣品即可。 失效根本原因的可接受的解決方案和成功預防的證明以及預防措施的實施，都可以作為受變更影響的器件重新考核說明。 只要解決和預防措施實施到位，證明該問題得到遏制，則該器件和同族器件都認為是合格的。 5 Qualification tests 考核測試 5.1 General tests 通用測試 傳播優(yōu)秀Word版文檔 ，希望對您有幫助，可雙擊去除！Test details are given in Table 1, Table 2, and Table 3. Not all tests apply to all devices. Table 1 tests gener