ax7010開發(fā)板原理圖v2 0_W

1、54321DescriptionREVDateV1.0First Release2016-7-12DDAX7010/AX7020 Schematics黑金ZYNQ硬件平臺 CCBBAATitleZynq-7000 Cover PageSizeDocument NumberAX7010/AX7020開發(fā)板原理圖Rev 1.0Date:Monday, October 08, 2018Sheet1of1654321Page NumberDescriptionPage01Cover PagePage02Block DiagramPage03Zynq-7000 JTAG & Bank0Page04Zyn

2、q-7000 MIO ConfigPage05Zynq-7000 Bank13-34-35Page06Zynq-7000 Bank502Page07Zynq-7000 PowerPage08DDR3Page09GPHYPage10USB OTGPage11FLASH, RTC, EEPROMPage12LED, KEYPage13UART, SDPage14HDMIPage15EXTEND IOPage16POWER54321DDCCBBAATitleZynq-7000 Block diagramSizeDocument NumberAX7010/AX7020開發(fā)板原理圖Rev 1.0Date

3、:Monday, October 08, 2018Sheet2of165432154321U1AM9DXP_0 DXN_0 VP_0 VN_0M10K9 L10F9FPGA_TCKTCK_0 TMS_0 TDO_0 TDI_0J6FPGA_TMSDVCC3V3 VCC1V8 AVCCDF6FPGA_TDOVCC1V8G6FPGA_TDIL1R10R1 4.7KINIT_B_0 PROGRAM_B_0CFGBVS_0 DONE_0L6R24.7KM6120OHM100MhzBANK0R11 FPGA_DONE4FPGA_DONEC1 470nFC2 0.1uFK10AGNDVREFN_0 VRE

4、FP_0L9AGNDAGNDF11VCC3V3VCCBATT_0J9VCCADC_0T6RSVDVCC1 RSVDVCC2 RSVDVCC3R6N6F10RSVDGND GNDADC_0J10L2120OHM100MhzZynq7010/7020AGNDAGNDCCVPLL+3P3VVPHYUSB_5VC4 0.1uFU2USB_5V40VREGIN+3P3OUTV391314R433RFPGA_TCKJ1VCCD VCCCORE VCCAADBUS0/TCK ADBUS1/TDI ADBUS2/TDO ADBUS3/TMSADBUS4 ADBUS5 ADBUS6 ADBUS7C7C8 0.1

5、uF 38R533RFPGA_TDI10uF0.1uF3715R13533RFPGA_TDO116R633RFPGA_TMSVCC D- D+ ID GND2617181920DM DP3475R7 10K34+3P3VRESET REFR8 12.1K 1%5MINI_USBC10 0.1uF21252627282930313233ACBUS0 ACBUS1 ACBUS2 ACBUS3 ACBUS4 ACBUS5 ACBUS6 ACBUS7 ACBUS8 ACBUS9 EECS45EECS EECLK EEDATAEECLK44EEDATA43C1327pF1XCSIBBY12XCSO12M

6、hz42TESTC1427pFFT232HL+3P3OUTVVPLL+3P3OUTVVPHY+3P3V+3P3OUTV+3P3VL3 120OHM100MhzL4 120OHM100MhzL5120OHM100Mhz+3P3VR10 10KR11 10KR12 10KC15 0.1uFC21 0.1uFC22 0.1uFC23 0.1uFC16 0.1uFC17 0.1uC18 0.1uC19 0.1uC20 0.1uFU687612EECSVCC NC1 NC2 VSSCS CLK DI DOEECLKC24 0.1uF 53EEDATA 4R132KAA93LC56BISNTitleZyn

7、q-7000 JTAG & Bank0SizeDocument NumberAX7010/AX7020開發(fā)板原理圖Rev 1.0Date:Monday, October 08, 2018Sheet3of16543216789SH1 SH2 SH3 SH44941AGND1 AGND2 AGND338VPHY VPLL1011222335364748GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8122446VCCIO1 VCCIO2 VCCIO3 C9 54321VCC3V3U1BE6MIO0_LED12111111111111151515151515121515

8、PS_MIO0_500 PS_MIO1_500 PS_MIO2_500 PS_MIO3_500 PS_MIO4_500 PS_MIO5_500 PS_MIO6_500 PS_MIO7_500 PS_MIO8_500 PS_MIO9_500 PS_MIO10_500 PS_MIO11_500 PS_MIO12_500 PS_MIO13_500 PS_MIO14_500 PS_MIO15_500MIO0_LEDA7QSPI_CSQSPI_CS QSPI_D0 QSPI_D1 QSPI_D2 QSPI_D3 QSPI_SCK PS_MIO7 PS_MIO8 PS_MIO9 PS_MIO10 PS_M

9、IO11 PS_MIO12 MIO13_LED PS_MIO14 PS_MIO15DDB8QSPI_D0D6QSPI_D1B7QSPI_D2A6QSPI_D3A5 D8R1433RQSPI_SCKBANK500PS_MIO7D5PS_MIO8B5PS_MIO9E9PS_MIO10C6PS_MIO11D9PS_MIO12E8MIO13_LEDC5PS_MIO14C8PS_MIO15C7PS_POR_BVCC3V39PS_POR_B_500PS_POR_BX1E7R2033R34PS_CLK_500OUT VDD21GND OEC25 0.1uFZynq7010/702033.333333MhzC

10、CVCC1V8U1CVCC1V8R251K 1%E11PS_MIO_VREF_501A19ETH_TXCK10PS_MIO16_501 PS_MIO17_501 PS_MIO18_501 PS_MIO19_501 PS_MIO20_501 PS_MIO21_501 PS_MIO22_501 PS_MIO23_501 PS_MIO24_501 PS_MIO25_501 PS_MIO26_501 PS_MIO27_501 PS_MIO28_501 PS_MIO29_501 PS_MIO30_501 PS_MIO31_501 PS_MIO32_501 PS_MIO33_501 PS_MIO34_50

11、1 PS_MIO35_501 PS_MIO36_501 PS_MIO37_501 PS_MIO38_501 PS_MIO39_501 PS_MIO40_501 PS_MIO41_501 PS_MIO42_501 PS_MIO43_501 PS_MIO44_501 PS_MIO45_501 PS_MIO46_501 PS_MIO47_501 PS_MIO48_501 PS_MIO49_501 PS_MIO50_501 PS_MIO51_501 PS_MIO52_501 PS_MIO53_501ETH_TXCKE14ETH_TXD0R26C26 0.01uF10ETH_TXD0B18ETH_TXD

12、11K 1%ETH_TXD1 ETH_TXD2 ETH_TXD3 ETH_TXCTL10101010D10ETH_TXD2A17ETH_TXD3F14ETH_TXCTLB17ETH_RXCK101010101010ETH_RXCK ETH_RXD0 ETH_RXD1 ETH_RXD2 ETH_RXD3 ETH_RXCTLD11ETH_RXD0A16ETH_RXD1F15ETH_RXD2A15ETH_RXD3D13ETH_RXCTLC16 OTG_DATA410OTG_DATA4C13OTG_DIR10101010OTG_DIR OTG_STP OTG_NXT OTG_DATA0C15OTG_S

13、TPBANK501E16OTG_NXTBBA14 OTG_DATA0D15OTG_DATA110OTG_DATA1A12OTG_DATA210OTG_DATA2F12 OTG_DATA310OTG_DATA3A11OTG_CLK10OTG_CLKA10 OTG_DATA5OTG_DATA510E13OTG_DATA610OTG_DATA6C18OTG_DATA710OTG_DATA7D14R87 40.2 1% SD_CLK10SD_CLKC17SD_CMD10SD_CMDE12SD_D01010101010SD_D0 SD_D1 SD_D2 SD_D3OTG_RESETNA9SD_D1VCC

14、1V8F13SD_D2B15SD_D3D16OTG_RESETNB14SD_CD10101010101010SD_CD UART_TX UART_RX MIO_KEY1 MIO_KEY2 ETH_MDC ETH_MDIOR28 10K R0603B12UART_TXC12UART_RXB13MIO_KEY1B9MIO_KEY2C10ETH_MDCPS_SRST_BC11ETH_MDIOB10 PS_SRST_BPS_SRST_B_501Zynq7010/7020AATitleZynq-7000 PS MIOSizeDocument NumberAX7010/7020 開發(fā)板原理圖Rev 1.0

15、Date:Monday, October 08, 2018Sheet4of1654321JTAGQSPISDPOWER ON RESETVCC3V3KEY1C27U70.1uF1234P1 P2#MRVDDButton1 GND #RESET 2 PS_POR_B TCM811TERCTRBOOT OPTIONVCC3V3R1520KPS_MIO8MIO8 =1 -MIO bank1 voltage=1.8VR1620KQSPI_D0MIO2 =0 -cascaded JTAGR1720KQSPI_D1MIO3 =0JTAG/NAND/Quad-SPI/SDR1820KQSPI_SCKMIO6

16、 =0 -PLL usedR1920KPS_MIO7MIO7 =0 -MIO bank0 voltage=3.3VVCC3V3R22J131K1R2420K QSPI_D3 23 R2320K QSPI_D24 VCC3V3R214 HEADER10KBoot ModeMIO5 (QSPI_D3)MIO4 (QSPI_D2 )JTAG00NAND01QSPI-FLASH10SD Card1154321VCC3V3X34333R R158PL_GCLKVDDOUTVCC3V3U1F12OEGNDC238 0.1uF50Mhz111515RTC_SCLKIO1_7P IO1_7NDD11 EEPR

17、OM_I2C_SCL1515151515151515151515151515151515151515IO1_15P IO1_15N IO1_14P IO1_14N IO1_12P IO1_12NIO1_13P IO1_13N IO1_11P IO1_11N IO1_2P IO1_2N IO1_3P IO1_3N IO1_5P IO1_5N IO1_9P IO1_9N IO1_4P IO1_4NEEPROM_I2C_SDA 111414141414141414141414HDMI_CLK_P HDMI_CLK_N HDMI_D2_P HDMI_D2_N HDMI_D1_P HDMI_D1_N H

18、DMI_D0_P HDMI_D0_N HDMI_CEC HDMI_HPD HDMI_OUT_ENIO1_12PR29 1K141212141515151515151515HDMI_SDA KEY4 KEY3HDMI_SCLIO1_10P IO1_10N IO1_1P IO1_1N IO1_6P IO1_6N IO1_8P IO1_8NCCZynq7010/7020VCCIOU1GVCC3V3U1E15151515151515151515151515151515151515151212111112121212IO2_10P IO2_10N IO2_7P IO2_7N IO2_15P IO2_15

19、N IO2_4P IO2_4N IO2_2P IO2_2N IO2_14P IO2_14N IO2_9P IO2_9N IO2_3P IO2_3N IO2_16P IO2_16N IO2_17P IO2_17N KEY1 KEY2RTC_DATA RTC_RESETLED1 LED2 LED3 LED415151515IO1_17P IO1_17N IO1_16P IO1_16N1515151515151515151515151515IO2_12P IO2_12N IO2_13P IO2_13N IO2_1P IO2_1N IO2_6P IO2_6N IO2_11P IO2_11N IO2_5

20、P IO2_5N IO2_8P IO2_8NBBZynq7010/7020Zynq7010/7020AATitleZynq-7000 Bank13 & 34 & 35SizeDocument NumberAX7010/AX7020開發(fā)板原理圖Rev 1.0Date:Monday, October 08, 2018Sheet5of1654321V5BANK13(Z7020 Only)IO_L6N_T0_VREF_13 IO_L11P_T1_SRCC_13 IO_L11N_T1_SRCC_13 IO_L12P_T1_MRCC_13 IO_L12N_T1_MRCC_13 IO_L13P_T2_MRC

21、C_13 IO_L13N_T2_MRCC_13 IO_L14P_T2_SRCC_13 IO_L14N_T2_SRCC_13 IO_L15P_T2_DQS_13 IO_L15N_T2_DQS_13 IO_L16P_T2_13 IO_L16N_T2_13 IO_L17P_T2_13 IO_L17N_T2_13 IO_L18P_T2_13 IO_L18N_T2_13 IO_L19P_T3_13 IO_L19N_T3_VREF_13 IO_L20P_T3_13 IO_L20N_T3_13 IO_L21P_T3_DQS_13 IO_L21N_T3_DQS_13 IO_L22P_T3_13 IO_L22N

22、_T3_13U7V7T9U10Y7Y6Y9Y8V8W8W10W9U9U8W11Y11T5U5Y12Y13V11V10V6W6G14BANK35IO_L11P_T1_SRCC_35IO_0_35IO_L11N_T1_SRCC_35IO_25_35IO_L12P_T1_MRCC_35IO_L1P_T0_AD0P_35IO_L12N_T1_MRCC_35IO_L1N_T0_AD0N_35IO_L13P_T2_MRCC_35IO_L2P_T0_AD8P_35IO_L13N_T2_MRCC_35 IO_L2N_T0_AD8N_35IO_L14P_T2_AD4P_SRCC_35 IO_L3P_T0_DQS

23、_AD1P_35IO_L14N_T2_AD4N_SRCC_35 IO_L3N_T0_DQS_AD1N_35IO_L15P_T2_DQS_AD12P_35 IO_L4P_T0_35IO_L15N_T2_DQS_AD12N_35IO_L4N_T0_35IO_L16P_T2_35IO_L5P_T0_AD9P_35IO_L16N_T2_35IO_L5N_T0_AD9N_35IO_L17P_T2_AD5P_35IO_L6P_T0_35IO_L17N_T2_AD5N_35IO_L6N_T0_VREF_35IO_L18P_T2_AD13P_35IO_L7P_T1_AD2P_35IO_L18N_T2_AD13

24、N_35IO_L7N_T1_AD2N_35IO_L19P_T3_35IO_L8P_T1_AD10P_35IO_L19N_T3_VREF_35IO_L8N_T1_AD10N_35IO_L20P_T3_AD6P_35IO_L9P_T1_DQS_AD3P_35IO_L20N_T3_AD6N_35 IO_L9N_T1_DQS_AD3N_35IO_L21P_T3_DQS_AD14P_35 IO_L10P_T1_AD11P_35IO_L21N_T3_DQS_AD14N_35 IO_L10N_T1_AD11N_35IO_L22P_T3_AD7P_35 IO_L22N_T3_AD7N_35IO_L23P_T3

25、_35 IO_L23N_T3_35 IO_L24P_T3_AD15P_35 IO_L24N_T3_AD15N_35L16L17J15K17C20K18B20H16B19H17A20J18E17H18D18F19D19F20D20G17E18G18E19J20F16H20F17G19M19G20M20H15M17G15M18K14L19J14L20N15K19N16J19L14L15M14M15K16J16R19BANK34IO_0_34IO_L11P_T1_SRCC_34IO_25_34IO_L11N_T1_SRCC_34IO_L1P_T0_34IO_L12P_T1_MRCC_34IO_L1N

26、_T0_34IO_L12N_T1_MRCC_34IO_L2P_T0_34IO_L13P_T2_MRCC_34IO_L2N_T0_34IO_L13N_T2_MRCC_34 IO_L3P_T0_DQS_PUDC_B_34 IO_L14P_T2_SRCC_34 IO_L3N_T0_DQS_34IO_L14N_T2_SRCC_34IO_L4P_T0_34IO_L15P_T2_DQS_34IO_L4N_T0_34IO_L15N_T2_DQS_34IO_L5P_T0_34IO_L16P_T2_34IO_L5N_T0_34IO_L16N_T2_34IO_L6P_T0_34IO_L17P_T2_34IO_L6

27、N_T0_VREF_34IO_L17N_T2_34IO_L7P_T1_34IO_L18P_T2_34IO_L7N_T1_34IO_L18N_T2_34IO_L8P_T1_34IO_L19P_T2_34IO_L8N_T1_34IO_L19N_T3_VREF_34 IO_L9P_T1_DQS_34IO_L20P_T3_34IO_L9N_T1_DQS_34IO_L20N_T3_34IO_L10P_T1_34IO_L21P_T3_DQS_34IO_L10N_T1_34IO_L21N_T3_DQS_34 IO_L22P_T3_34 IO_L22N_T3_34 IO_L23P_T3_34 IO_L23N_

28、T3_34 IO_L24P_T3_34 IO_L24N_T3_34U14T19U15T11U18 PL_GCLKT10U19T12N18U12P19U13N20V13P20V12T20W13U20T14V20T15W20P14Y18R14Y19Y16V16Y17W16W14R16Y14R17T16T17U17R18V15V17W15V18W18W19N17P18P15P1654321DDU1D88888888888888888888888888888888DDR3_A0 DDR3_A1 DDR3_A2 DDR3_A3 DDR3_A4 DDR3_A5 DDR3_A6 DDR3_A7 DDR3_A

29、8 DDR3_A9 DDR3_A10 DDR3_A11 DDR3_A12 DDR3_A13 DDR3_A14888888888888888DDR3_D0 DDR3_D1 DDR3_D2 DDR3_D3 DDR3_D4 DDR3_D5 DDR3_D6 DDR3_D7 DDR3_D8 DDR3_D9 DDR3_D10 DDR3_D11 DDR3_D12 DDR3_D13 DDR3_D14 DDR3_D15 DDR3_D16 DDR3_D17 DDR3_D18 DDR3_D19 DDR3_D20 DDR3_D21 DDR3_D22 DDR3_D23 DDR3_D24 DDR3_D25 DDR3_D2

30、6 DDR3_D27 DDR3_D28 DDR3_D29 DDR3_D30 DDR3_D31CC888DDR3_BA0 DDR3_BA1 DDR3_BA2DDR3_DM0 DDR3_DM1 DDR3_DM2 DDR3_DM38888VCC1V58DDR3_CLK0_P8DDR3_CLK0_N88DDR3_S0 DDR3_WE DDR3_CAS DDR3_RAS DDR3_CKE DDR3_ODT88888888888888DDR3_DQS0_P DDR3_DQS0_N DDR3_DQS1_P DDR3_DQS1_N DDR3_DQS2_P DDR3_DQS2_N DDR3_DQS3_P DDR

31、3_DQS3_NDDR3_RESET8Zynq7010/7020BBAATitleZynq-7000 Bank502SizeDocument NumberAX7010/AX7020開發(fā)板原理圖Rev 1.0Date:Monday, October 08, 2018Sheet6of1654321.6R 1%.6R 1%DDR3_D0C3BANK502PS_DDR_DQ0_502PS_DDR_A0_502PS_DDR_DQ1_502PS_DDR_A1_502PS_DDR_DQ2_502PS_DDR_A2_502PS_DDR_DQ3_502PS_DDR_A3_502PS_DDR_DQ4_502PS_

32、DDR_A4_502PS_DDR_DQ5_502PS_DDR_A5_502PS_DDR_DQ6_502PS_DDR_A6_502PS_DDR_DQ7_502PS_DDR_A7_502PS_DDR_DQ8_502PS_DDR_A8_502PS_DDR_DQ9_502PS_DDR_A9_502PS_DDR_DQ10_502PS_DDR_A10_502PS_DDR_DQ11_502PS_DDR_A11_502PS_DDR_DQ12_502PS_DDR_A12_502PS_DDR_DQ13_502PS_DDR_A13_502PS_DDR_DQ14_502PS_DDR_A14_502 PS_DDR_DQ

33、15_502PS_DDR_DQ16_502PS_DDR_BA0_502PS_DDR_DQ17_502PS_DDR_BA1_502PS_DDR_DQ18_502PS_DDR_BA2_502 PS_DDR_DQ19_502PS_DDR_DQ20_502PS_DDR_DM0_502PS_DDR_DQ21_502PS_DDR_DM1_502PS_DDR_DQ22_502PS_DDR_DM2_502PS_DDR_DQ23_502PS_DDR_DM3_502 PS_DDR_DQ24_502PS_DDR_DQ25_502PS_DDR_CKP_502PS_DDR_DQ26_502PS_DDR_CKN_502

34、PS_DDR_DQ27_502PS_DDR_DQ28_502PS_DDR_VRP_502PS_DDR_DQ29_502PS_DDR_VRN_502 PS_DDR_DQ30_502PS_DDR_DQ31_502PS_DDR_CS_B_502PS_DDR_DQS_P0_502PS_DDR_WE_B_502PS_DDR_DQS_N0_502PS_DDR_CAS_B_502PS_DDR_DQS_P1_502PS_DDR_RAS_B_502PS_DDR_DQS_N1_502PS_DDR_CKE_502PS_DDR_DQS_P2_502PS_DDR_ODT_502 PS_DDR_DQS_N2_502PS_

35、DDR_DQS_P3_502PS_DDR_DRST_B_502 PS_DDR_DQS_N3_502N2DDR3_A0DDR3_D1B3K2DDR3_A1R3DDR3_D2A2M3DDR3_A2DDR3_D3A4K3DDR3_A3DDR3_D4D3M4DDR3_A4DDR3_D5D1L1DDR3_A5DDR3_D6C1L4DDR3_A6DDR3_D7E1K4DDR3_A7DDR3_D8E2K1DDR3_A8DDR3_D9E3J4DDR3_A9DDR3_D10G3F5DDR3_A10DDR3_D11H3G4DDR3_A11DDR3_D12J3E4DDR3_A12DDR3_D13H2D4DDR3_A

36、13DDR3_D14H1F4DDR3_A14DDR3_D15J1L5DDR3_BA0DDR3_D16P1DDR3_D17P3R4DDR3_BA1DDR3_D18R3J5DDR3_BA2DDR3_D19R1A1DDR3_DM0DDR3_D20T4DDR3_D21U4F1DDR3_DM1DDR3_D22U2T1DDR3_DM2DDR3_D23U3Y1DDR3_DM3DDR3_D24V1L2DDR3_CLK0_PDDR3_D25Y3DDR3_D26W1M2DDR3_CLK0_NDDR3_D27Y4H5DDR3_VRPDDR3_D28Y2DDR3_D29W3G5DDR3_VRNR3DDR3_D30V2

37、N1DDR3_S0DDR3_D31V3DDR3_DQS0_PC2M5DDR3_WEDDR3_DQS0_NB2P5DDR3_CASDDR3_DQS1_PG2P4DDR3_RASDDR3_DQS1_NF2N3DDR3_CKEDDR3_DQS2_PR2N5DDR3_ODTDDR3_DQS2_NT2B4DDR3_RESETDDR3_DQS3_PW5DDR3_DQS3_NW454321VCC1V0VCC3V3VCCINVCC3V3VCCO_13C28 47uFU1HC33C42C43C46C47C51DDC34C35C36C38C39C29C40 470nFK6IO POWER/CORE POWER47

38、0nF 470nF 470nF4.7uF 4.7uF 100uFVCCO_0VCC1V0100uF 4.7uF 4.7uF 470nFVCC3V3T8R13VCCO_13_1 VCCO_13_2 VCCO_13_3 VCCO_13_4VCCINT_1 VCCINT_2 VCCINT_3 VCCINT_4 VCCINT_5 VCCINT_6 VCCINT_7 VCCINT_8 VCCINT_9U11P12 N13 M12 L13 K12 J13 H12 G13VCC1V8W7VCC3V3VCC3V3Y10VCC_AUXVCCO_34N19 R15 T18 V14 W17VCCO_34_1 VCC

39、O_34_2 VCCO_34_3 VCCO_34_4 VCCO_34_5 VCCO_34_6C58C59C60C63C52C53C54C55C56C57C61C62C30 470nF47uF 4.7uF 470nF 470nFVCC1V8100uF 4.7uF 4.7uF 4.7uF 470nF470nF470nF470nFVCCIO_35VCC1V8Y20VCC_PAUX C19 F18 H14 J17 K20 M16N11 R9 P10 N9 L11 J11VCCO_35_1 VCCO_35_2 VCCO_35_3 VCCO_35_4 VCCO_35_5 VCCO_35_6VCCAUX_1

40、 VCCAUX_2 VCCAUX_3 VCCAUX_4 VCCAUX_5 VCCAUX_6VCCIO_35C64C65C66C67C68C69100uF 4.7uF 4.7uF 470nF 470nF 470nFVCCO_35VCC1V5VCC1V8 VCC1V0A3 D2VCCO_DDR_502_1 VCCO_DDR_502_2 VCCO_DDR_502_3 VCCO_DDR_502_4 VCCO_DDR_502_5 VCCO_DDR_502_6 VCCO_DDR_502_7 VCCO_DDR_502_8 VCCO_DDR_502_9 VCCO_DDR_502_10C70C71C72C73C

41、74C75C76C77C78 470nFM8VCC_BRAMVCCPAUX_1 VCCPAUX_2 VCCPAUX_3 VCCPAUX_4 VCCPAUX_5100uF 4.7uF 4.7uF 4.7uF 470nF470nF470nF470nFE5K8 H8 F8 G9G1H4VCC1V0L3C79C80C82C83P247uF 4.7uF 470nF 470nFVCC1V5R5H10CCVCCBRAM_1 VCCBRAM_2U1G11VCCO_DDR_502V4VCC1V0VCC3V3VCC1V0VCCPINTB6VCCO_MIO0_500_1 VCCO_MIO0_500_2C85C86C

42、87C88C89C90C91 470nFC92 470nFC93 470nFC94 470nFC95 470nFC96 470nFD7R7 P8VCC1V8VCCPINT_1 VCCPINT_2 VCCPINT_3 VCCPINT_4 VCCPINT_5 VCCPINT_6100uF 100uF 4.7uF 4.7uF 4.7uF 470nFA13 B16 D12N7 L7 J7 G7C97C98C99C100 C101 C102 C103 C104 C202C105 100uFVCCO_MIO1_501_1 VCCO_MIO1_501_2 VCCO_MIO1_501_3 VCCO_MIO1_

43、501_4470nF 470nF 470nF 470nF 470nF 4.7uF 4.7uF 4.7uF 4.7uFVTTREFE15VCC3V3VCC1V8VCC1V8 L6 120OHM100Mhz VCCO_MIO0_500VCCO_MIO1_501H6 P6PS_DDR_VREF0_502_1 PS_DDR_VREF0_502_2G812VCCPLLC106 C107 C108 100uF 4.7uF 470nFC109 470nFC110 C111 100uF 4.7uFC112 C113 4.7uF 470nFC114 470nFC115 470nFC116 10uFC117 47

44、0nFC118 0.01uFC119 0.1uFZynq7010/7020BBU1IT13 U6 U16 V9 V19 W2 W12 Y5 Y15 R8 R12 R20 T3 T7H19 H13 H11 H9 H7 L12 L8 K15 K13 C9 K7 K5 J12 J8 J2GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13 GND14GND44 GND43 GND42 GND41 GND40 GND39 GND38 GND37 GND36 GND35 GND34 GND33 GND32 GND31 GND30DIGITAL GNDZynq7010/7020AATitleZynq-7000 Cover PageSizeDocument NumberAX7010/AX7020開發(fā)板原理圖Rev 1.0Date:Monday, October 08, 2018Sheet7of1654321P7